System memory training with chipset attached memory
System memory training with chipset attached memory is described. In accordance with the described techniques, a request is received to train a system memory of a device. Responsive to the request, contents of the system memory are transferred to a chipset attached memory. The device is operated using the contents from the chipset attached memory. While the device is being operated using the contents from the chipset attached memory, the system memory is dynamically trained. After the training is complete, the contents are transferred back from the chipset attached memory to the trained system memory.
1 . An apparatus comprising:
a system memory;
a memory controller configured to:
provide a transfer request to the system memory to cause contents maintained by the system memory to be transferred from the system memory to a chipset attached memory; and
reset and train the system memory; and
a processing unit to continue to operate by executing one or more tasks using the contents transferred from the system memory and stored in the chipset attached memory while the system memory is being reset and trained.
2 . The apparatus of claim 1 , wherein the memory controller is further configured to, after the system memory is trained, provide an additional transfer request to the chipset attached memory to cause the contents to be transferred back from the chipset attached memory to the trained system memory.
3 . The apparatus of claim 2 , wherein the processing unit is further configured to execute one or more tasks using the contents transferred back to the trained system memory.
4 . The apparatus of claim 1 , wherein the memory controller provides the transfer request responsive to receiving a request to train the system memory.
5 . The apparatus of claim 4 , wherein the request to train the system memory includes one or more specified memory settings or a specified memory profile.
6 . The apparatus of claim 4 , wherein the request to train the system memory comprises a user request.
7 . The apparatus of claim 6 , wherein the user request identifies a specific improvement to the system memory.
8 . The apparatus of claim 7 , wherein the specific improvement of the system memory comprises one or more of an improvement in speed, performance, power, usage, or accuracy.
9 . The apparatus of claim 4 , wherein the request comprises an automatic system request.
10 . A method comprising:
transferring, via a chipset link, contents of a system memory to a chipset attached memory; and
continuing to operate a device using the contents from the chipset attached memory while the system memory is reset and trained.
11 . The method of claim 10 , wherein the operating the device includes executing, by a processing unit of the device, one or more tasks of an operating system or an application using the contents from the chipset attached memory.
12 . The method of claim 10 , further comprising, after the system memory is trained, transferring, via the chipset link, the contents back from the chipset attached memory to the trained system memory via the chipset link.
13 . The method of claim 12 , further comprising operating the device using the contents transferred back to the trained system memory.
14 . The method of claim 12 , further comprising, after the system memory is trained, outputting one or more notifications indicating that the system memory has been trained.
15 . The method of claim 10 , wherein the transferring occurs responsive to receiving a request to train the system memory.
16 . The method of claim 15 , wherein the request to train the system memory includes one or more specified memory settings or a specified memory profile.
17 . The method of claim 15 , wherein the request to train the system memory comprises a user request.
18 . The method of claim 17 , wherein the user request identifies a specific improvement to the system memory that includes one or more of an improvement in speed, performance, power, usage, or accuracy.
19 . The method of claim 15 , wherein the request comprises an automatic system request.
20 . A system comprising:
a system memory;
a chipset attached memory configured to store contents of the system memory while the system memory is reset and trained and transfer the contents back to the trained system memory after the training is complete; and
a processing unit configured to continue to operate by performing operations using the contents transferred from the system memory and stored in the chipset attached memory while the system memory is being reset and trained.