IP Library Granted Patent US 11,908,409
Granted Patent B2
US 11,908,409 · App. 18/148,002 · Granted Feb 20, 2024

Display apparatus

Inventors: Kazuyoshi Omata (Tokyo, JP); Hiroyuki Kimura (Tokyo, JP); Makoto Shibusawa (Tokyo, JP); Hiroshi Tabatake (Tokyo, JP)
Assignee: Japan Display Inc.
G09G3/3233G09G3/32G09G3/3258H05B45/60H10K59/1213H10K59/1216H10K59/131G09G3/2003G09G3/325G09G2300/0426G09G2300/0452G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/0262G09G2320/0233G09G2320/0252G09G2320/043H01L27/124H01L27/1255H10K59/123H10K59/351
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,908,409
App. No.
18/148,002
Granted
Feb 20, 2024
Kind
B2
Abstract

According to one embodiment, a display apparatus includes a plurality of semiconductor layers, a first insulation film, a first conductive layer, a second insulation film and a display element includes a second conductive layer. The first conductive layer and the second conductive layer are opposed to each other to form a capacitance unit.

Claims (65)

1. A display device including a plurality of pixels, the display device comprising:

a semiconductor layer;

a first insulation layer on the semiconductor layer;

a first conductive layer on the first insulation layer;

a second insulation layer on the first insulation layer and the first conductive layer;

a second conductive layer on the second insulation layer;

a third insulation layer on the second insulation layer and the second conductive layer;

a third conductive layer on the third insulation layer; and

a partition insulation layer on the third insulation layer and the third conductive layer;

each of the plurality of pixels comprising:

a display element electrically connected to and between a first conductor and a second conductor; and

a drive transistor electrically connected to and between the first conductor and the display element and configured to control a current value from the first conductor to the display element, wherein

the first conductor is electrically connected to a high potential power line,

the second conductor is electrically connected to a low potential power line,

one of electrodes of the display element is formed in the third conductive layer,

a channel of the drive transistor is formed in the semiconductor layer,

a gate of the drive transistor is formed in the first conductive layer,

the second conductive layer extends so as not to contact the gate, and not to contact a source or a drain of the drive transistor,

the one of electrodes of the display element, the second conductive layer, and the gate of the drive transistor overlap with each other in a plane view,

the partition insulation layer covers an edge of the one of electrodes of the display element, and

the partition insulation layer includes an opening exposing a part of an upper surface of the one of electrodes of the display element.

2. The display device according to claim 1 , wherein

the opening of the partition insulation layer, the second conductive layer, and the gate of the drive transistor overlap with each other in the plane view.

3. The display device according to claim 1 , wherein

the second conductive layer extends between adjacent two pixels in the plurality of pixels continuously.

4. The display device according to claim 1 , further comprising:

a video signal line, wherein

the second conductive layer intersects the video signal line.

5. The display device according to claim 1 , further comprising:

an output switch between the first conductor and the drive transistor, wherein

the output switch is configured to select to supply or not to supply a current from the first conductor to the display element, and

the output switch is configured to be controlled by a signal different from that of the drive transistor.

6. The display device according to claim 5 , wherein

both of the channel of the drive transistor and a channel of the output switch are formed of the semiconductor layer continuously.

7. A display device including a plurality of pixels, the display device comprising:

a semiconductor layer;

a first insulation layer on the semiconductor layer;

a first conductive layer on the first insulation layer;

a second insulation layer on the first insulation layer and the first conductive layer;

a second conductive layer on the second insulation layer;

a third insulation layer on the second insulation layer and the second conductive layer; and

a third conductive layer on the third insulation layer,

each of the plurality of pixels comprising:

a display element electrically connected to and between a first conductor and a second conductor; and

a drive transistor electrically connected to and between the first conductor and the display element and configured to control a current value from the first conductor to the display element, wherein

the first conductor is electrically connected to a high potential power line, and

the second conductor is electrically connected to a low potential power line,

one of electrodes of the display element is formed in the third conductive layer,

a channel of the drive transistor is formed in the semiconductor layer,

a gate of the drive transistor is formed in the first conductive layer,

the second conductive layer extends so as not to contact the gate, and not to contact a source or a drain of the drive transistor,

the one of electrodes of the display element, the second conductive layer, and the gate of the drive transistor overlap with each other in a plane view, and

the second conductive layer extends between adjacent two pixels in the plurality of pixels continuously.

8. The display device according to claim 7 , further comprising:

a partition insulation layer on the third insulation layer and the third conductive layer; wherein

the partition insulation layer includes an opening exposing a part of an upper surface of the one on electrodes of the display element, and the opening of the partition insulation layer, the second conductive layer, and the gate of the drive transistor overlap with each other in the plane view.

9. The display device according to claim 7 , further comprising:

a video signal line, wherein

the second conductive layer intersects the video signal line.

10. The display device according to claim 7 , further comprising:

an output switch between the first conductor and the drive transistor, wherein

the output switch is configured to select to supply or not to supply a current from the first conductor to the display element, and

the output switch is configured to be controlled by a signal different from that of the drive transistor.

11. The display device according to claim 10 , wherein

both of the channel of the drive transistor and a channel of the output switch are formed of the semiconductor layer continuously.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2022
From: OMATA, KAZUYOSHI; KIMURA, HIROYUKI; SHIBUSAWA, MAKOTO; TABATAKE, HIROSHI
To: JAPAN DISPLAY INC.
Reel/Frame 062236/0352 →
Priority Claims (3)
JP 2012-231740 · Oct 19, 2012 · national
JP 2013-012286 · Jan 25, 2013 · national
JP 2013-032359 · Feb 21, 2013 · national
Continuity (7)
Continuation 17315771 · May 10, 2021
Continuation 16784693 · Feb 7, 2020
Continuation 16119655 · Aug 31, 2018
Continuation 15365428 · Nov 30, 2016
Continuation 15167401 · May 27, 2016
Continuation 14056282 · Oct 17, 2013
Related Publication 20230137112A1 · May 4, 2023
Cited By (2)
US 12,249,283 US 12,646,464