IP Library › Granted Patent US 12,218,080
Granted Patent B2
US 12,218,080 · App. 18/182,728 · Granted Feb 4, 2025

Package structure with reinforced element

Inventors: Shin-Puu Jeng (Hsinchu, TW); Po-Yao Lin (Zhudong Township, Hsinchu County, TW); Shuo-Mao Chen (New Taipei, TW); Chia-Hsiang Lin (Zhubei, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L23/562H01L21/4853H01L21/4857H01L21/565H01L21/6835H01L23/3128H01L23/5383H01L23/5386H01L23/642H01L24/16H01L2221/68372H01L2224/16227H01L2924/19041H01L2924/19103H01L2924/3511
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Quick Facts
Patent No.
US 12,218,080
App. No.
18/182,728
Granted
Feb 4, 2025
Kind
B2
Abstract

A package structure is provided. The package structure includes a reinforced plate and multiple conductive structures penetrating through the reinforced plate. The package structure also includes a redistribution structure over the reinforced plate. The redistribution structure has multiple polymer-containing layers and multiple conductive features. The package structure further includes multiple chip structures bonded to the redistribution structure through multiple solder bumps. In addition, the package structure includes a protective layer surrounding the chip structures.

Claims (47)

1. A package structure, comprising:

a reinforced plate;

a plurality of conductive structures penetrating through the reinforced plate;

a redistribution structure over the reinforced plate, wherein the redistribution structure comprises a plurality of polymer-containing layers and a plurality of conductive features, the reinforced plate is thinner than the redistribution structure, and a thickness ratio of a thickness of the reinforced plate to a thickness of the redistribution structure is greater than about 0.5;

a plurality of chip structures bonded to the redistribution structure through a plurality of solder bumps;

an underfill structure surrounding the solder bumps, wherein a portion of the underfill structure is between the redistribution structure and the chip structures; and

a protective layer surrounding the chip structures, wherein the underfill structure separates at least one of the chip structures from the protective layer.

2. The package structure as claimed in claim 1 , further comprising:

a dielectric layer extending along a top surface of the reinforced plate and extending along sidewalls of the conductive structures.

3. The package structure as claimed in claim 1 , further comprising:

an interconnection structure between the reinforced plate and the redistribution structure, wherein the interconnection structure comprises a passivation layer, a plurality of silicon-containing oxide layers, and a plurality of second conductive features, and the passivation layer is thinner than the plurality of silicon-containing oxide layers.

4. The package structure as claimed in claim 3 , wherein the passivation layer is in direct contact with the redistribution structure.

5. The package structure as claimed in claim 1 , further comprising:

a second redistribution structure, wherein the reinforced plate is between the second redistribution structure and the redistribution structure, and the second redistribution structure comprises a plurality of second polymer-containing layers and a plurality of second conductive features.

6. The package structure as claimed in claim 1 , wherein the reinforced plate is made of a glass material.

7. The package structure as claimed in claim 1 , wherein the reinforced plate is made of a semiconductor material.

8. The package structure as claimed in claim 1 , wherein the reinforced plate is in direct contact with a polymer-containing layer of the polymer-containing layers of the redistribution structure.

9. The package structure as claimed in claim 1 , further comprising:

a thermal conductive structure extending across opposite edges of the chip structures, wherein the thermal conductive structure is in direct contact with the underfill structure.

10. The package structure as claimed in claim 1 , further comprising:

a thermal conductive structure over the chip structures, wherein the thermal conductive structure extends across opposite edges of the chip structures.

11. A package structure, comprising:

a reinforced plate;

a redistribution structure over the reinforced plate, wherein the redistribution structure comprises a plurality of polymer-containing layers and a plurality of first conductive features;

an interconnection structure between the reinforced plate and the redistribution structure, wherein the interconnection structure comprises a passivation layer, a plurality of silicon-containing oxide layers, and a plurality of second conductive features, wherein the passivation layer is in direct contact with the redistribution structure;

a plurality of chip structures bonded to the redistribution structure through a plurality of solder bumps;

a protective layer surrounding the chip structures; and

a thermal conductive structure directly on the chip structures.

12. The package structure as claimed in claim 11 , wherein the reinforced plate is as wide as the redistribution structure.

13. The package structure as claimed in claim 11 , wherein the reinforced plate is as wide as the protective layer.

14. The package structure as claimed in claim 11 , further comprising:

a first electrode layer, a capacitor dielectric layer, and a second electrode layer extending into the reinforced plate from a top surface of the reinforced plate.

15. The package structure as claimed in claim 11 , further comprising:

a second redistribution structure in direct contact with a bottom surface of the reinforced plate.

16. A package structure, comprising:

a reinforced plate;

a redistribution structure over the reinforced plate, wherein the redistribution structure comprises a plurality of polymer-containing layers and a plurality of first conductive features;

an interconnection structure between the reinforced plate and the redistribution structure, wherein the interconnection structure comprises a plurality of silicon-containing oxide layers and a plurality of second conductive features, wherein the interconnection structure is thinner than the redistribution structure;

a plurality of chip structures bonded to the redistribution structure through a plurality of solder bumps;

a protective layer surrounding the chip structures; and

a thermal conductive structure extending across opposite edges of the chip structures, wherein the thermal conductive structure is in direct contact with the protective layer.

17. The package structure as claimed in claim 16 , wherein the interconnection structure is in direct contact with the redistribution structure.

18. The package structure as claimed in claim 16 , further comprising:

a second redistribution structure, wherein the reinforced plate is between the second redistribution structure and the redistribution structure, and the second redistribution structure comprises a plurality of second polymer-containing layers and a plurality of third conductive features.

19. The package structure as claimed in claim 18 , wherein the second redistribution structure is in direct contact with the reinforced plate.

20. The package structure as claimed in claim 16 , further comprising:

a plurality of conductive vias penetrating through the reinforced plate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2023
From: JENG, SHIN-PUU; LIN, PO-YAO; CHEN, SHUO-MAO; LIN, CHIA-HSIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 062962/0953 →
Continuity (3)
Continuation 17071030 · Oct 15, 2020
Provisional Application 63061828 · Aug 6, 2020
Related Publication 20230223360A1 · Jul 13, 2023
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