IP Library › Granted Patent US 12,604,690
Granted Patent B2
US 12,604,690 · App. 18/244,583 · Granted Apr 14, 2026

Systems and methods for selective metal-containing hardmask removal

Inventors: Baiwei Wang (Santa Clara, CA); Rohan Puligoru Reddy (San Jose, CA); Xiaolin C. Chen (San Ramon, CA); Wanxing Xu (Sunnyvale, CA); Zhenjiang Cui (San Jose, CA); Anchuan Wang (San Jose, CA)
Assignee: Applied Materials, Inc.
H01L21/31122
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Quick Facts
Patent No.
US 12,604,690
App. No.
18/244,583
Granted
Apr 14, 2026
Kind
B2
Abstract

Exemplary semiconductor processing methods may include flowing an etchant precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may define an exposed region of a metal-containing hardmask material and an exposed region of a material characterized by a dielectric constant of less than or about 4.0. The methods may include contacting the substrate with the etchant precursor. The methods may include removing at least a portion of the metal-containing hardmask material.

Claims (42)

1 . A semiconductor processing method comprising:

flowing an etchant precursor into a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein the substrate defines an exposed region of a metal-containing hardmask material, an exposed region of a metal material, and an exposed region of a material characterized by a dielectric constant of less than or about 4.0;

contacting the substrate with the etchant precursor; and

removing at least a portion of the metal-containing hardmask material.

2 . The semiconductor processing method of claim 1 , wherein the etchant precursor comprises a halogen-containing precursor.

3 . The semiconductor processing method of claim 1 , wherein the etchant precursor comprises nitrogen trifluoride (NF 3 ), diatomic fluorine (F 2 ), diatomic chlorine (Cl 2 ), thionyl chloride (SOCl 2 ), carbon tetrafluoride (CF 4 ), hexafluoroethane (C 2 F 6 ), sulfur hexafluoride (SF 6 ), carbon tetrachloride (CCl 4 ), dichloromethane (CH 2 Cl 2 ), chloroform (CHCl 3 ), or a combination thereof.

4 . The semiconductor processing method of claim 1 , wherein the etchant precursor comprises nitrogen trifluoride (NF 3 ).

5 . The semiconductor processing method of claim 1 , further comprising:

flowing a hydrogen-containing precursor or an oxygen-containing precursor to the processing region of the semiconductor processing chamber with the etchant precursor.

6 . The semiconductor processing method of claim 1 , wherein removing the portion of the metal-containing hardmask material is performed plasma-free.

7 . The semiconductor processing method of claim 1 , wherein removing the portion of the metal-containing hardmask material is performed at a temperature greater than or about 350° C.

8 . The semiconductor processing method of claim 1 , wherein removing the portion of the metal-containing hardmask material is performed at a pressure greater than or about 2 Torr.

9 . The semiconductor processing method of claim 1 , further comprising:

prior to flowing the etchant precursor into the processing region of the semiconductor processing chamber, removing an oxidized portion of the metal-containing hardmask material.

10 . The semiconductor processing method of claim 1 , further comprising:

subsequent to removing the portion of the metal-containing hardmask material, contacting the substrate with a second etchant precursor to remove fluorine-containing residue from the substrate or an oxidized portion of the metal-containing hardmask material.

11 . The semiconductor processing method of claim 1 , wherein the metal-containing hardmask material is a titanium-containing hardmask material.

12 . The semiconductor processing method of claim 1 , wherein the metal-containing hardmask material includes doped carbide.

13 . A semiconductor processing method comprising:

flowing a pre-etching precursor into a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein the substrate defines an exposed region of a metal-and-nitrogen-containing hardmask material, an exposed region of a metal-containing material, and an exposed region of a material characterized by a dielectric constant of less than or about 4.0;

contacting the substrate with the pre-etching precursor to at least partially oxidize the exposed region of the metal-containing material;

halting delivery of the pre-etching precursor;

flowing an etchant precursor into the processing region of the semiconductor processing chamber;

contacting the substrate with the etchant precursor; and

selectively removing at least a portion of the metal-and-nitrogen-containing hardmask material relative to the material characterized by the dielectric constant of less than or about 4.0.

14 . The semiconductor processing method of claim 13 , wherein the pre-etching precursor comprises nitrogen trifluoride (NF 3 ), tungsten hexafluoride (WF 6 ), or boron trichloride (BCl 3 ).

15 . The semiconductor processing method of claim 13 , further comprising:

forming plasma effluents of the pre-etching precursor.

16 . The semiconductor processing method of claim 13 , wherein the etchant precursor comprises nitrogen trifluoride (NF 3 ), diatomic fluorine (F 2 ), diatomic chlorine (Cl 2 ), thionyl chloride (SOCl 2 ), carbon tetrafluoride (CF 4 ), hexafluoroethane (C 2 F 6 ), sulfur hexafluoride (SF 6 ), carbon tetrachloride (CCl 4 ), dichloromethane (CH 2 Cl 2 ), chloroform (CHCl 3 ), or a combination thereof.

17 . The semiconductor processing method of claim 13 , wherein removing the portion of the metal-and-nitrogen-containing hardmask material is performed plasma-free.

18 . The semiconductor processing method of claim 13 , wherein the metal-containing material is a metal material.

19 . A semiconductor processing method comprising:

flowing an etchant precursor into a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein the substrate defines an exposed region of a metal-containing hardmask material;

contacting the substrate with the etchant precursor;

removing at least a portion of the metal-containing hardmask material relative to one or more other materials on the substrate;

halting delivery of the etchant precursor;

flowing a post-etching precursor into the processing region of the semiconductor processing chamber;

contacting the substrate with the post-etching precursor; and

removing a fluorine-containing residue from the substrate.

20 . The semiconductor processing method of claim 19 , wherein the etchant precursor comprises a halogen-containing precursor.

21 . The semiconductor processing method of claim 20 , wherein the one or more other materials on the substrate comprise a dielectric constant of less than or about 4.0, a metal material, a silicon-containing material, or a metal-and-oxygen-containing material.

22 . The semiconductor processing method of claim 19 , wherein removing the portion of the metal-containing hardmask material is performed at a temperature greater than or about 350° C. and at a pressure greater than or about 2 Torr.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2024
From: WANG, BAIWEI; REDDY, ROHAN PULIGORU; CHEN, XIAOLIN C.; XU, WANXING; CUI, ZHENJIANG; WANG, ANCHUAN
To: APPLIED MATERIALS, INC.
Reel/Frame 066145/0945 →
Continuity (1)
Related Publication 20250087494A1 · Mar 13, 2025
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