Implantation for Isolated Channel Structures in Group III-Nitride Semiconductor Devices
Semiconductor devices are provided. In one example, a semiconductor device includes a Group III-nitride semiconductor structure. The semiconductor device includes a first contact on the Group III-nitride semiconductor structure. The semiconductor device includes a second contact on the Group III-nitride semiconductor structure. The second contact is spaced apart from the first contact. The Group III-nitride semiconductor structure includes a plurality of channel structures extending in a length direction between the first contact and the second contact. The semiconductor device includes an isolation implant region extending along at least a portion of a length of at least one of the plurality of channel structures. The isolation implant region comprises implanted dopants.
1 . A semiconductor device, comprising:
a Group III-nitride semiconductor structure;
a first contact on the Group III-nitride semiconductor structure;
a second contact on the Group III-nitride semiconductor structure, the second contact spaced apart from the first contact;
wherein the Group III-nitride semiconductor structure comprises a plurality of channel structures extending in a length direction between the first contact and the second contact; and
wherein the semiconductor device comprises an isolation implant region extending along at least a portion of a length of at least one of the plurality of channel structures, wherein the isolation implant region comprises implanted dopants.
2 . The semiconductor device of claim 1 , wherein the Group III-nitride semiconductor structure has a recess between the plurality of channel structures.
3 . The semiconductor device of claim 2 , wherein the recess extends through the Group III-nitride semiconductor structure to a substrate.
4 . The semiconductor device of claim 2 , wherein the recess has one or more sloped sidewalls.
5 . The semiconductor device of claim 2 , wherein each channel structure of the plurality of channel structures has a first width and the recess between the plurality of channel structures has a second width, wherein a ratio of the first width to the second width is in a range of about 0.5:1 to about 2:1.
6 . The semiconductor device of claim 2 , wherein the semiconductor device further comprises a heat spreading layer on the plurality of channel structures and in the recess.
7 . The semiconductor device of claim 1 , wherein each channel structure comprises a channel layer and a barrier layer, the barrier layer having a different bandgap relative to the channel layer.
8 . The semiconductor device of claim 1 , wherein the first contact comprises a source contact and the second contact comprises a drain contact, wherein the semiconductor device further comprises a gate contact, the gate contact having a long dimension extending generally perpendicular to the length of the plurality of channel structures.
9 . The semiconductor device of claim 1 , further comprising a field plate.
10 . The semiconductor device of claim 1 , wherein each channel structure comprises a second isolation implant region in the channel structure opposite the isolation implant region.
11 . The semiconductor device of claim 1 , wherein the isolation implant region extends through the channel structure to an interface between the channel structure and a substrate.
12 . The semiconductor device of claim 1 , wherein the isolation implant region extends at least partially into a substrate.
13 . The semiconductor device of claim 1 , wherein the implanted dopants comprise one or more of nitrogen, hydrogen, helium, zirconium, or oxygen.
14 . The semiconductor device of claim 1 , wherein the implanted dopants have a peak dopant concentration at a depth in the isolation implant region within about 250 Angstroms or less of a substrate.
15 . The semiconductor device of claim 1 , wherein the implanted dopants have a peak dopant concentration of at least about 1×10 18 dopants/cm 3 .
16 . The semiconductor device of claim 1 , wherein the Group III-nitride semiconductor structure is an N-polar Group III-nitride semiconductor structure.
17 . The semiconductor device of claim 1 , wherein the Group III-nitride semiconductor structure is on a substrate, the substrate comprising silicon carbide.
18 . The semiconductor device of claim 1 , wherein the semiconductor device comprises a high electron mobility transistor.
19 . A transistor device, comprising:
a substrate;
a Group III-nitride semiconductor structure on the substrate, the Group III-nitride semiconductor structure comprising a first channel structure and a second channel structure that is electrically isolated from the first channel structure;
a source contact on the Group III-nitride semiconductor structure;
a drain contact on the Group III-nitride semiconductor structure; and
wherein the first channel structure and the second channel structure each have a length extending in a first direction that is generally perpendicular to a second direction corresponding to a long dimension of the source contact and a long dimension of the drain contact.
20 .- 39 . (canceled)
40 . A method of forming a semiconductor device, comprising:
forming a Group III-nitride semiconductor structure on a substrate;
implanting dopants into the Group III-nitride semiconductor structure to form an isolation implant region in the Group III-nitride semiconductor structure, the isolation implant region separating the Group III-nitride semiconductor structure into a plurality of channel structures, the plurality of channel structures electrically isolated from one another;
forming a first contact on the Group III-nitride semiconductor structure;
forming a second contact on the Group III-nitride semiconductor structure, the second contact spaced apart from the first contact;
wherein each of the plurality of channel structures has a length extending between the first contact and the second contact; and
wherein the isolation implant region extends along a length of one of the plurality of channel structures.
41 .- 55 . (canceled)