Image sensor device
View Patent ↗A device includes a plurality of photodiode regions within a semiconductor substrate, a plurality of transistors, a plurality of deep trench isolation (DTI) structures, and a plurality of isolation structures. The transistors are over a front-side surface of the semiconductor substrate. The DTI structures extend a first depth from a backside surface of the semiconductor substrate into the semiconductor substrate. The isolation structures extend a second depth from the backside surface of the semiconductor substrate into the semiconductor substrate. The second depth is less than the first depth. From a plan view, each of the plurality of isolation structures has a triangular profile at the backside surface of the semiconductor substrate.
1. A device, comprising:
a plurality of photodiode regions within a semiconductor substrate;
a plurality of transistors over a front-side surface of the semiconductor substrate;
a plurality of deep trench isolation (DTI) structures extending a first depth from a backside surface of the semiconductor substrate into the semiconductor substrate; and
a plurality of isolation structures extending a second depth from the backside surface of the semiconductor substrate into the semiconductor substrate, wherein the second depth is less than the first depth of the plurality of DTI structures, wherein from a plan view, each of the plurality of isolation structures has a triangular profile at the backside surface of the semiconductor substrate,
wherein from the plan view, the plurality of DTI structures form a grid pattern comprising first grid lines extending in a first direction, and second grid lines extending in a second direction orthogonal to the first direction,
wherein the triangular profile of each of the plurality of isolation structures comprises a first side parallel with the first direction.
2. The device of claim 1 , wherein the triangular profile of each of the plurality of isolation structures further comprises a second side and a third side both non-parallel with the first and second directions.
3. The device of claim 1 , wherein each of the plurality of isolation structures comprises three triangular inclined surfaces respectively extending from three sides of the triangular profile to a vertex within the semiconductor substrate.
4. The device of claim 3 ,
wherein a first one and a second one of the triangular inclined surfaces form a border extending in the second direction from the plan view.
5. The device of claim 4 , wherein the second one and a third one of the triangular inclined surfaces form a border non-parallel with the first and second directions.
6. The device of claim 5 , wherein the first one and the third one of the triangular inclined surfaces form a border non-parallel with the first and second directions.
7. The device of claim 3 , wherein from a cross-sectional view, the vertex of each of the plurality of isolation structures is sharper than a bottom end of each of the plurality of DTI structures.
8. The device of claim 1 , further comprising:
a metal grid over the DTI structures and the isolation structures.
9. The device of claim 8 , wherein the metal grid overlaps with the DTI structures and non-overlaps with the isolation structures.
10. A device, comprising:
a plurality of light-sensing regions in a semiconductor substrate;
a plurality of transistors over a front-side surface of the semiconductor substrate;
a plurality of first isolation structures extending from a backside surface of the semiconductor substrate into the semiconductor substrate, wherein from a plan view, the plurality of first isolation structures are connected as a grid; and
a plurality of second isolation structures extending from the backside surface of the semiconductor substrate into the semiconductor substrate, wherein from the plan view, the plurality of second isolation structures form a plurality of triangular profiles at the backside surface of the semiconductor substrate,
wherein from the plan view, the plurality of first isolation structures form a grid pattern comprising first grid lines extending in a first direction, and second grid lines extending in a second direction orthogonal to the first direction,
wherein the triangular profile of each of the plurality of second isolation structures comprises a first side parallel with the first direction.
11. The device of claim 10 , wherein from the plan view, each of the plurality of triangular profiles further comprises a second side non-parallel with the first grid lines and the second grid lines.
12. The device of claim 11 , wherein from the plan view, each of the plurality of triangular profiles further comprises a third side non-parallel with the first grid lines and the second grid lines.
13. The device of claim 10 , further comprising:
a metal grid over the grid formed from the plurality of first isolation structures.
14. The device of claim 13 , further comprising:
a passivation layer over the metal grid.
15. The device of claim 10 , wherein each of the first isolation structures has a depth greater than a depth of each of the second isolation structures from a cross-sectional view.
16. The device of claim 10 , wherein each of the plurality of second isolation structures comprises three triangular inclined surfaces respectively extending from three sides of the triangular profile of said each of the plurality of second isolation structures to a vertex within the semiconductor substrate.
17. The device of claim 16 , wherein a first one and a second one of the triangular inclined surfaces form a border extending in the second direction from the plan view.
18. The device of claim 17 , wherein the second one and a third one of the triangular inclined surfaces form a border non-parallel with the first and second directions.
19. A device, comprising:
a plurality of light-sensing regions in a semiconductor substrate;
a plurality of transistors over a front-side surface of the semiconductor substrate;
a plurality of first deep trench isolation (DTI) structures extending from a backside surface of the semiconductor substrate into the semiconductor substrate;
a plurality of second DTI structures extending from the backside surface of the semiconductor substrate into the semiconductor substrate, wherein from a plan view, the plurality of first DTI structures extend in a first direction, and the plurality of second DTI structures extend in a second direction orthogonal to the first direction; and
a plurality of isolation structures extending from the backside surface of the semiconductor substrate into the semiconductor substrate, wherein from the plan view, each of the plurality of isolation structures resembles a quadrilateral pattern at the backside surface of the semiconductor substrate, the quadrilateral pattern has four sides non-parallel with the first direction and the second direction, wherein each of the plurality of isolation structures comprises four triangular inclined surfaces respectively extending from the four sides of the quadrilateral pattern to a vertex within the semiconductor substrate, wherein a first one and a second one of the triangular inclined surfaces form a boundary extending in the first direction from the plan view, wherein the second one and a third one of the triangular inclined surfaces form a boundary extending in the second direction from the plan view.
20. The device of claim 19 , wherein the quadrilateral pattern is a square pattern.