Submounts with Stud Protrusions for Semiconductor Packages
Semiconductor packages are provided. In one example, the semiconductor package includes a submount. The semiconductor package further includes a recess in the submount. The recess includes a bottom surface defining a recess plane. The recess further includes at least one stud protrusion extending from the recess plane. The semiconductor package further includes a semiconductor die on the at least one stud protrusion.
1 . A semiconductor package, comprising:
a submount;
a recess in the submount comprising a bottom surface defining a recess plane, the recess comprising at least one stud protrusion extending from the recess plane; and
a semiconductor die on the at least one stud protrusion.
2 . The semiconductor package of claim 1 , wherein the submount defines a base plane, and wherein the recess plane and the base plane are non-coplanar.
3 . The semiconductor package of claim 2 , wherein the recess comprises one or more sidewall surfaces extending from the base plane to the recess plane.
4 . The semiconductor package of claim 3 , wherein the one or more sidewall surfaces are inclined at an oblique angle with respect to the base plane.
5 . The semiconductor package of claim 4 , wherein the oblique angle is in a range of about 30° to about 60°.
6 . The semiconductor package of claim 1 , wherein the recess has a first height and the at least one stud protrusion extends to a second height, and wherein the first height is greater than the second height.
7 . The semiconductor package of claim 1 , wherein the recess has a first height and the at least one stud protrusion extends to a second height, and wherein the second height is greater than the first height.
8 . The semiconductor package of claim 1 , wherein a height of the at least one stud protrusion is substantially equal to a height of the recess.
9 . The semiconductor package of claim 1 , wherein the at least one stud protrusion has a height in a range of about 1 micron to about 40 microns.
10 - 11 . (canceled)
12 . The semiconductor package of claim 1 , wherein the recess comprises at least one stud protrusion in one of a center portion of the recess or a peripheral portion of the recess.
13 - 16 . (canceled)
17 . The semiconductor package of claim 1 , wherein the at least one stud protrusion has a planar surface, the semiconductor die being on the planar surface of the at least one stud protrusion.
18 - 19 . (canceled)
20 . The semiconductor package of claim 17 , wherein the planar surface of the at least one stud protrusion comprises one of a circular cross-section or a square cross-section.
21 - 35 . (canceled)
36 . A semiconductor package, comprising:
a semiconductor die comprising a wide bandgap semiconductor device;
a submount comprising a recess, the recess comprising a bottom surface defining a recess plane;
a plurality of stud protrusions in the recess;
a die-attach material in the recess, the die-attach material coupling the semiconductor die to the plurality of stud protrusions in the recess; and
an encapsulating portion of the semiconductor die, wherein the plurality of stud protrusions extend from the recess plane in a direction toward the semiconductor die.
37 - 45 . (canceled)
46 . The semiconductor package of claim 36 , wherein the semiconductor die is directly on the plurality of stud protrusions.
47 - 48 . (canceled)
49 . The semiconductor package of claim 36 , wherein the plurality of stud protrusions are arranged in an array on the recess of the submount, and wherein each stud protrusion of the plurality of stud protrusions is separated by a distance in a range of about 100 microns to about 300 microns.
50 - 60 . (canceled)
61 . The semiconductor package of claim 36 , wherein the die-attach material at least partially fills a space between adjacent stud protrusions of the plurality of stud protrusions on the recess.
62 . The semiconductor package of claim 61 , wherein the die-attach material comprises one of a sintered material or an electroless deposited material.
63 . (canceled)
64 . The semiconductor package of claim 62 , further comprising a conductive catalytic layer on one or more of the semiconductor die or the recess, wherein the conductive catalytic layer comprises at least one of gold, palladium, nickel, or aluminum.
65 - 67 . (canceled)
68 . The semiconductor package of claim 36 , wherein the wide bandgap semiconductor device comprises a silicon carbide-based MOSFET, a silicon carbide-based Schottky diode, or a Group III nitride-based high electron mobility transistor.
69 . A submount, comprising:
a recess comprising a bottom surface defining a recess plane; and
at least one stud protrusion extending from the recess plane.
70 - 94 . (canceled)