EDGE TERMINATION USING IMPLANT DAMAGE
A semiconductor device includes a semiconductor substrate having a first conductivity type and a drift layer on the semiconductor substrate. The semiconductor device includes an active region and an edge termination region adjacent at least a portion of the active region. The edge termination region includes a damage region in the drift layer that is formed by implantation of electrically active ions into the drift layer. Related methods are also disclosed.
1 . A semiconductor device, comprising:
a semiconductor substrate having a first conductivity type; and
a drift layer on the semiconductor substrate;
wherein the semiconductor device comprises an active region and an edge termination region adjacent at least a portion of the active region;
wherein the edge termination region comprises a damage region in the drift layer that is formed by implantation of electrically active ions into the drift layer.
2 . The semiconductor device of claim 1 , wherein the implantation of electrically active ions generates crystal lattice damage to the drift layer.
3 . The semiconductor device of claim 2 , wherein the crystal lattice damage forms a junction-less edge termination region.
4 . The semiconductor device of claim 1 , wherein the first conductivity type comprises a n-type conductivity.
5 . The semiconductor device of claim 1 , wherein the semiconductor substrate comprises one of silicon carbide (SiC), zinc oxide, gallium oxide, or gallium nitride.
6 . The semiconductor device of claim 5 , wherein, when the semiconductor substrate comprises SiC, the semiconductor substrate comprises one of 4H—SiC or 6H—SiC.
7 . The semiconductor device of claim 1 , wherein the edge termination region is formed without annealing at a temperature greater than 1000 degrees Fahrenheit.
8 . The semiconductor device of claim 1 , wherein the edge termination region is formed without annealing at a temperature greater than 1500 degrees Fahrenheit.
9 . The semiconductor device of claim 1 , wherein the electrically active ions comprise aluminum ions.
10 . The semiconductor device of claim 9 , wherein the aluminum ions are implanted with a dose of 1.5E15 cm −2 .
11 . The semiconductor device of claim 1 , wherein the aluminum ions are implanted at an implant energy of at least about 80 keV.
12 . The semiconductor device of claim 1 , further comprising:
a metal contact on the drift layer that is adjacent the active region of the semiconductor device.
13 . The semiconductor device of claim 12 , wherein the metal contact is further adjacent a portion of the edge termination region.
14 . The semiconductor device of claim 12 , further comprising:
a passivation layer on the drift layer and is adjacent a portion of the edge termination region.
15 . The semiconductor device of claim 12 , further comprising:
a plurality of damage regions in the drift layer beneath the metal contact.
16 . The semiconductor device of claim 15 , wherein the plurality of damage regions are in contact with the metal contact.
17 . The semiconductor device of claim 1 , wherein the damage region comprises a region having un-annealed crystal lattice damage due to ion implantation.
18 . The semiconductor device of claim 17 , wherein the damage region is characterized by having a therma-wave unit (TWU) value of between about 5000 TWU and 50,000 TWU.
19 . The semiconductor device of claim 18 , wherein a ratio of a TWU value for the damage region relative to a TWU value for an unimplanted portion of the drift layer is between about 50 and 400.
20 . A method of forming a semiconductor device, comprising:
providing a semiconductor substrate having a first conductivity type;
forming a drift layer on the semiconductor substrate; and
implanting electrically active ions into the drift layer to form an edge termination region in the drift layer adjacent at least a portion of an active region of the semiconductor device.
21 . The method of claim 20 , wherein implanting the electrically active ions generates crystal lattice damage to the drift layer.
22 . The method of claim 21 , wherein the crystal lattice damage forms a junction-less edge termination region.
23 . The method of claim 20 , wherein the first conductivity type comprises a n-type conductivity.
24 . The method of claim 23 , wherein the semiconductor substrate comprises one of silicon carbide (SiC), zinc oxide, gallium oxide, or gallium nitride.
25 . The method of claim 24 , wherein, when the semiconductor substrate comprises SiC, the semiconductor substrate comprises 4H—SiC or 6H—SiC.
26 . The method of claim 20 , wherein the edge termination region is formed without being heated to a temperature greater than 1000 degrees Fahrenheit after implantation of the electrically active ions.
27 . The method of claim 20 , wherein the edge termination region is formed without being heated to a temperature greater than 1500 degrees Fahrenheit after implantation of the electrically active ions.
28 . The method of claim 20 , wherein the electrically active ions comprise aluminum ions.
29 . The method of claim 28 , wherein the aluminum ions are implanted with a dose of 1.5E15 cm −2 .
30 . The method of claim 20 , wherein the aluminum ions are implanted at an implant energy of at least about 80 keV.
31 . The method of claim 20 , further comprising:
forming an implant mask on the drift layer prior to implantation of the electrically active ions.
32 . The method of claim 20 , further comprising:
forming a metal contact on the drift layer after implantation of the electrically active ions, wherein the metal contact is adjacent the active region of the semiconductor device.
33 . The method of claim 32 , wherein the metal contact is further adjacent a portion of the edge termination region.
34 . The method of claim 32 , further comprising:
forming a passivation layer on the drift layer and is adjacent a portion of the edge termination region.
35 . The method of claim 32 , further comprising:
forming a plurality of damage regions in the drift layer beneath the metal contact.
36 . The method of claim 32 , wherein the plurality of damage regions are in contact with the metal contact.
37 . The method of claim 20 , wherein the semiconductor device is formed without being heated to a temperature greater than 1000 degrees Fahrenheit following implantation of the electrically active ions to form the edge termination layer.
38 . The method of claim 20 , wherein the semiconductor device is formed without being heated to a temperature greater than 1500 degrees Fahrenheit following implantation of the electrically active ions to form the edge termination layer.
39 . The method of claim 20 , wherein the edge termination region is characterized by having a therma-wave unit (TWU) value of between about 5000 TWU and 50,000 TWU.
40 . The semiconductor device of claim 39 , wherein a ratio of a TWU value for the edge termination region relative to a TWU value for an unimplanted portion of the drift layer is between about 50 and 400.