IP Library › Granted Patent US 12,483,192
Granted Patent B2
US 12,483,192 · App. 18/509,014 · Granted Nov 25, 2025

Temperature compensation in oscillator circuits

Inventors: Sadique Mohammad Iqbal (Karimganj, IN); Divya Tripathi (Noida, IN); Anubhav Srivastava (Gorakhpur, IN); Krishna Thakur (GautamBudh Nagar, IN)
Assignee: NXP USA, Inc.
H03B5/24H03B5/04H03K19/017509
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Quick Facts
Patent No.
US 12,483,192
App. No.
18/509,014
Granted
Nov 25, 2025
Kind
B2
Abstract

Systems and methods for providing temperature compensation in oscillators circuits are discussed. In various embodiments, these systems and methods may be implemented in technologies where only resistors with the same type (positive or negative) of temperature coefficients of resistance are available. For example, in some implementations, an oscillator circuit may include a voltage generator coupled to an input terminal of a common gate amplifier through a first resistor, and a frequency-to-voltage converter coupled to another input terminal of the common gate amplifier through a second resistor, where the second resistor may be configured to reduce a frequency variation of the oscillator circuit in response to temperature changes.

Claims (26)

1 . An oscillator circuit, comprising:

a voltage generator coupled to an input terminal of a common gate amplifier, the voltage generator having a first resistor coupled to the input terminal; and

a frequency-to-voltage converter coupled to another input terminal of the common gate amplifier, the frequency-to-voltage converter having a second resistor coupled to the another input terminal, wherein the second resistor is configured to reduce a frequency variation of the oscillator circuit in response to temperature changes, wherein temperature coefficients of the first resistor and the second resistor are either both positive temperature coefficients or both negative temperature coefficients.

2 . The oscillator circuit of claim 1 , wherein the oscillator is fabricated with fin-shaped field-effect transistor (FinFET) technology.

3 . The oscillator circuit of claim 1 , further comprising a current-controlled oscillator (CCO) coupled to an output terminal of a current mode comparator.

4 . The oscillator circuit of claim 1 , further comprising a level shifter coupled to the CCO.

5 . The oscillator circuit of claim 1 , further comprising a buffer coupled to the level shifter.

6 . The oscillator circuit of claim 1 , further comprising a phase splitter coupled to the buffer.

7 . The oscillator circuit of claim 6 , wherein the phase splitter is coupled to the frequency-to-voltage converter.

8 . The oscillator circuit of claim 1 , wherein a second resistance of the second resistor is selected to reduce a difference between: (a) a product between a first resistance value of the first resistor and a first positive temperature coefficient of the first resistor, and (b) a product between the second resistance value of the second resistor and a second positive temperature coefficient of the second resistor.

9 . The oscillator circuit of claim 8 , wherein the first positive temperature coefficient is different from the second positive temperature coefficient.

10 . The oscillator circuit of claim 1 , wherein a second resistance of the second resistor is selected to reduce a difference between: (a) a product between a first resistance value of the first resistor and a first negative temperature coefficient of the first resistor, and (b) a product between the second resistance value of the second resistor and a second negative temperature coefficient of the second resistor.

11 . The oscillator circuit of claim 10 , wherein the first negative temperature coefficient is different from the second negative temperature coefficient.

12 . An electronic device, comprising:

a circuit; and

an oscillator configured to provide a clock signal to the circuit, the oscillator further comprising a common gate amplifier having a first input coupled to a voltage generator, the voltage generator having a first resistor coupled to the first input, and having a second input coupled to a frequency-to-voltage converter, the frequency-to-voltage converter having a second resistor coupled to the second input, wherein the second resistor has a second resistance selected based, at least in part, upon a product between a first resistance of the first resistor and a temperature coefficient of the first resistor, wherein temperature coefficients of the first resistor and the second resistor are either both positive temperature coefficients or both negative temperature coefficients.

13 . The electronic device of claim 12 , wherein the circuit comprises a processing core fabricated with fin-shaped field-effect transistor (FinFET) technology.

14 . The electronic device of claim 12 , wherein the temperature coefficient comprises a first positive temperature coefficient, and wherein the second resistance is selected based, at least in part, upon a difference between: (a) a product between the first resistance and the first positive temperature coefficient, and (b) a product between the second resistance and a second positive temperature coefficient of the second resistor.

15 . The electronic device of claim 14 , wherein the first positive temperature coefficient is different from the second positive temperature coefficient.

16 . The electronic device of claim 12 , wherein the temperature coefficient comprises a first negative temperature coefficient, and wherein the second resistance is selected based, at least in part, upon a difference between: (a) a product between the first resistance and the first negative temperature coefficient, and (b) a product between the second resistance and a second negative temperature coefficient of the second resistor.

17 . The electronic device of claim 16 , wherein the first negative temperature coefficient is different from the second negative temperature coefficient.

18 . A method, comprising:

coupling a voltage generator to a first input of a common gate amplifier, the voltage generator having a first resistor coupled to the first input; and

coupling a frequency-to-voltage converter to a second input of the common gate amplifier, the frequency-to-voltage converter having a second resistor coupled to the second input, wherein the second resistor has a second resistance selected based, at least in part, upon a first resistance of the first resistor, wherein temperature coefficients of the first resistor and the second resistor are either both positive temperature coefficients or both negative temperature coefficients.

19 . The method of claim 18 , wherein the second resistance is selected based, at least in part, upon a difference between: (a) a product between the first resistance and a first positive temperature coefficient of the first resistor, and (b) a product between the second resistance and a second positive temperature coefficient of the second resistor.

20 . The method of claim 18 , wherein the second resistance is selected based, at least in part, upon a difference between: (a) a product between the first resistance and a first negative temperature coefficient of the first resistor, and (b) a product between the second resistance and a second negative temperature coefficient of the second resistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2023
From: IQBAL, SADIQUE MOHAMMAD; TRIPATHI, DIVYA; SRIVASTAVA, ANUBHAV; THAKUR, KRISHNA
To: NXP USA, INC.
Reel/Frame 065561/0370 →
Priority Claims (1)
IN 202311034695 · May 17, 2023 · national
Continuity (1)
Related Publication 20240388252A1 · Nov 21, 2024
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