Granted Patent B2

US 12,376,498 · App. 18/520,401 · Granted Jul 29, 2025

Inventors: Jeffrey Lille (Sunnyvale, CA); Nathan Franklin (San Jose, CA)

Assignee: Sandisk Technologies, Inc.

H10N50/10G11C5/08G11C11/161G11C11/1673H10N50/01H10N50/80

Abstract

Claims (39)

1. A spin-orbit-torque (SOT) magnetoresistive memory device comprising at least one SOT memory cell, wherein each of the at least one SOT memory cell overlies a substrate and comprises:

a first electrode embedded in dielectric material layers overlying the substrate;

a magnetic-tunnel-junction-containing (MTJ-containing) pillar structure contacting a top surface of the first electrode and comprising a ferromagnetic pinned layer, a ferromagnetic free layer that overlies the pinned layer, a tunneling barrier layer located between the free layer and the pinned layer, and a nonmagnetic coupling layer that overlies the free layer;

a spin current metal line including a portion that contacts the nonmagnetic coupling layer of the MTJ-containing pillar structure; and

a second electrode and a third electrode which overlie the MTJ containing pillar structure and which are electrically connected to the spin current metal line.

2. The SOT magnetoresistive memory device of claim 1 , wherein a bottom periphery of the nonmagnetic coupling layer coincides with a top periphery of the free layer.

3. The SOT magnetoresistive memory device of claim 1 , further comprising:

an MTJ-level dielectric material layer laterally surrounding the MTJ-containing pillar structure; and

a stress-generating dielectric liner located on a top surface of the MTJ-level dielectric material layer and is coplanar with the spin current metal line.

4. The SOT magnetoresistive memory device of claim 3 , wherein a top surface of the nonmagnetic coupling layer is located within a same horizontal plane as a top surface of the stress-generating dielectric liner.

5. The SOT magnetoresistive memory device of claim 3 , wherein the spin current metal line contacts a top surface of the nonmagnetic coupling layer and a top surface of the stress-generating dielectric liner.

6. The SOT magnetoresistive memory device of claim 3 , wherein a bottom surface of the stress-generating dielectric liner is located above a horizontal plane including a bottom surface of the free layer.

7. The SOT magnetoresistive memory device of claim 3 , wherein the stress-generating dielectric liner comprises a carbon-based material including carbon at an atomic concentration greater than 90%.

8. The SOT magnetoresistive memory device of claim 3 , wherein the stress-generating dielectric liner consists essentially of diamond-like carbon (DLC).

9. The SOT magnetoresistive memory device of claim 3 , further comprising a metal via structure vertically extending through the MTJ-level dielectric material layer and the stress-generating dielectric liner and having a top surface located within a horizontal plane including a top surface of the stress-generating dielectric liner.

10. The SOT magnetoresistive memory device of claim 1 , further comprising a passivation dielectric spacer laterally surrounding the MTJ-containing pillar structure.

11. The SOT magnetoresistive memory device of claim 1 , further comprising a selector element that overlies, is electrically connected to a first end of the spin current metal line, and is laterally offset from the MTJ containing pillar structure.

12. The SOT magnetoresistive memory device of claim 11 , wherein:

the second electrode contacts a top surface of the selector element;

the third electrode comprises a metal via structure contacting a segment of a top surface of the spin current metal line; and

the third electrode is laterally offset from the MTJ containing pillar.

13. The SOT magnetoresistive memory device of claim 1 , wherein the nonmagnetic coupling layer comprises at least one first metal having an atomic number in a range from 72 to 79 at a total atomic percentage greater than 90%.

14. The SOT magnetoresistive memory device of claim 13 , wherein the spin current metal line comprises at least one second metal having an atomic number in a range from 72 to 79.

15. A data storage system comprising a plurality of the SOT magnetoresistive memory devices of claim 1 .

16. The data storage system of claim 15 , wherein:

at least two of the plurality of the SOT magnetoresistive memory devices share a common word line connected to the second electrode; and

at least two of the plurality of the SOT magnetoresistive memory devices share a common bit line connected to the third electrode.

17. A method of performing a reading operation on the SOT magnetoresistive memory device of claim 1 , comprising:

applying a read voltage pulse the first electrode to generate a write current which flows through the MTJ containing pillar structure and through the spin current metal line to the third electrode; and

determining a resistance state of the SOT magnetoresistive memory device using an external circuitry based on a magnitude of the read current.

18. The method of claim 17 , wherein:

an absolute value of the read voltage pulse is less than or equal to 0.25V;

the read voltage pulse is unipolar during the reading operation; and

a length of the read voltage pulse is less than 10 nanoseconds.

19. A method of performing a writing operation on the SOT magnetoresistive memory device of claim 11 , comprising applying a write voltage pulse to the second electrode to generate a write current which flows through the selector element and through the spin current metal line to the third electrode to change a resistance state of the MTJ containing pillar structure.

20. The method of claim 19 , wherein:

an absolute value of the wrote voltage pulse is at least 2.5V;

the write voltage pulse has a positive or a negative polarity; and

a length of the write voltage pulse is less than 10 nanoseconds.

Assignments (8)

Continuity (1)

References Cited (31)