IP Library Patent Application 18540135
Patent Application
App. No. 18/540,135

ASYMMETRIC EDGE TERMINATION

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Patent No.
US None
App. No.
18/540,135
Abstract

A semiconductor device includes a semiconductor epitaxial structure having an off-axis orientation such that a crystallographic direction of the semiconductor epitaxial structure is non-perpendicular to a planar surface of the semiconductor epitaxial structure, and a doped region in the semiconductor epitaxial structure, wherein the doped region is formed by ion implantation into the semiconductor epitaxial structure along the crystallographic direction. The doped region includes a first region and a second region, wherein the first region is perpendicular to the second region. The first region and the second region have equal widths.

Claims (56)

1 . A semiconductor device, comprising:

a semiconductor epitaxial structure having an off-axis orientation such that a crystallographic direction of the semiconductor epitaxial structure is non-perpendicular to a planar surface of the semiconductor epitaxial structure; and

a doped region in the semiconductor epitaxial structure, wherein the doped region is formed by ion implantation into the semiconductor epitaxial structure along the crystallographic direction;

wherein the doped region comprises a first region and a second region, wherein the first region is perpendicular to the second region; and

wherein the first region and the second region have equal widths.

2 . The semiconductor device of claim 1 , wherein the crystallographic direction is offset at an angle of less than 10 degrees relative to a normal direction that is normal to the planar surface of the semiconductor epitaxial structure.

3 . The semiconductor device of claim 1 , wherein the crystallographic direction of the semiconductor epitaxial structure is a crystallographic direction along which implant channeling occurs.

4 . The semiconductor device of claim 1 , wherein the semiconductor epitaxial structure comprises a hexagonal crystal structure, and wherein the crystallographic direction of the semiconductor epitaxial structure comprises a <0001> direction of the hexagonal crystal structure.

5 . The semiconductor device of claim 1 , wherein the doped region comprises a guard ring.

6 . The semiconductor device of claim 5 , wherein the semiconductor epitaxial structure comprises a first conductivity type and having an epitaxial structure thereon that is configured as a drift region of the semiconductor device, wherein the semiconductor epitaxial structure has an active region formed on and/or in the drift region that is configured to block voltage in a reverse bias direction and providing current flow in a forward bias direction, wherein the guard ring is adjacent at least a portion of the active region of the semiconductor epitaxial structure.

7 . The semiconductor device of claim 1 , wherein the semiconductor epitaxial structure comprises silicon carbide.

8 . A method of forming a semiconductor device, comprising:

providing a semiconductor epitaxial structure;

providing a mask on the semiconductor epitaxial structure;

forming first and second openings in the mask, wherein the first opening extends in a first direction and has a first width, and the second opening extends in a second direction that is perpendicular to the first direction, and has a second width that is greater than the first width; and

implanting ions into a planar surface of the semiconductor epitaxial structure through the first and second openings in the mask along a direction that is non-perpendicular to the planar surface of the semiconductor epitaxial structure to form a first doped region and a second doped region in the semiconductor substrate corresponding respectively to the first opening and the second opening;

wherein the first doped region and the second doped region have equal widths.

9 . The method of claim 8 , wherein the semiconductor epitaxial structure has an off-axis orientation such that a crystallographic direction of the semiconductor epitaxial structure is non-perpendicular to the planar surface of the semiconductor epitaxial structure, wherein implanting the ions is performed along the crystallographic direction.

10 . The method of claim 9 , wherein the crystallographic direction of the semiconductor epitaxial structure is a crystallographic direction along which implant channeling occurs.

11 . The method of claim 9 , wherein the semiconductor epitaxial structure comprises a hexagonal crystal structure, and wherein the crystallographic direction of the semiconductor epitaxial structure comprises a <0001> direction of the hexagonal crystal structure.

12 . The method of claim 9 , wherein the first doped region and the second doped region form part of a guard ring.

13 . The method of claim 8 , wherein the semiconductor epitaxial structure comprises silicon carbide.

14 . A semiconductor device, comprising:

a semiconductor epitaxial structure having an off-axis orientation such that a crystallographic direction of the semiconductor epitaxial structure is non-perpendicular to a planar surface of the semiconductor epitaxial structure,

an active region in the semiconductor epitaxial structure; and

an edge termination region in the semiconductor epitaxial structure adjacent the active region;

wherein the edge termination region comprises a first region and a second region, wherein the first region is parallel to the second region; and

wherein a width of the edge termination region in the first region is smaller than a width of the edge termination region in the second region.

15 . The semiconductor device of claim 14 , wherein the crystallographic direction is tilted in a first direction toward a planar surface of the semiconductor epitaxial structure;

wherein the first region and the second region extend in a second direction that is perpendicular to the first direction.

16 . The semiconductor device of claim 15 , wherein the width of the first region is the width of the first region in the first direction and the width of the second region is the width of the second region in the first direction.

17 . The semiconductor device of claim 14 , wherein the edge termination region comprises a plurality of guard rings.

18 . The semiconductor device of claim 14 , wherein the first region and the second region are on opposite sides of the active region.

19 . The semiconductor device of claim 14 , wherein the crystallographic direction is tilted toward the second region and away from the first region.

20 . The semiconductor device of claim 14 , wherein the edge termination region comprises a doped region that is formed by ion implantation into the semiconductor epitaxial structure.

21 . The semiconductor device of claim 14 , wherein the edge termination region surrounds the active region, wherein the edge termination region comprises a third region and a fourth region, wherein the third region is parallel to the fourth region, and wherein the third region and the fourth region are perpendicular to the first region and the second region; and

wherein the width of the second region is equal to widths of the third region and the fourth region.

22 . A method of forming a semiconductor device, comprising:

providing a semiconductor epitaxial structure having an off-axis orientation such that a crystallographic direction of the semiconductor epitaxial structure is non-perpendicular to a planar surface of the semiconductor epitaxial structure;

forming an active region in the semiconductor epitaxial structure; and

forming an edge termination region in the semiconductor epitaxial structure adjacent the active region;

wherein the edge termination region comprises a first region and a second region, wherein the first region is parallel to the second region; and

wherein a width of the edge termination region in the first region is smaller than a width of the edge termination region in the second region.

23 . The method of claim 22 , wherein the crystallographic direction is tilted in a first direction toward a planar surface of the semiconductor epitaxial structure;

wherein the first region and the second region extend in a second direction that is perpendicular to the first direction.

24 . The method of claim 23 , wherein the width of the first region is the width of the first region in the first direction and the width of the second region is the width of the second region in the first direction.

25 . The method of claim 22 , wherein the edge termination region comprises a plurality of guard rings.

26 . The method of claim 22 , wherein the first region and the second region are on opposite sides of the active region.

27 . The method of claim 22 , wherein the crystallographic direction is tilted toward the second region and away from the first region.

28 . The method of claim 22 , wherein the edge termination region comprises a doped region that is formed by ion implantation into the semiconductor epitaxial structure.

29 . The method of claim 22 , wherein the edge termination region surrounds the active region, wherein the edge termination region comprises a third region and a fourth region, wherein the third region is parallel to the fourth region, and wherein the third region and the fourth region are perpendicular to the first region and the second region; and

wherein the width of the second region is equal to widths of the third region and the fourth region.

30 . A mask pattern for manufacturing a semiconductor device, wherein the mask pattern defines an active region and an edge termination ring adjacent to the active region;

wherein the edge termination ring comprises a first region and a second region, wherein the first region is perpendicular to the second region; and

wherein the first region and the second region have different widths.

31 . The mask pattern of claim 30 , wherein the edge termination ring comprises a third region and a fourth region, wherein the third region is parallel to the first region and the fourth region is parallel to the second region, and wherein the first region and the third region have equal widths and the second region and the fourth region have equal widths.

Assignments (8)
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Mar 26, 2026
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 075280/0919 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 69180/0437 Recorded Sep 30, 2025
From: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WOLFSPEED, INC.
Reel/Frame 072989/0088 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0113 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0381 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0467 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0588 →
SECURITY INTEREST Recorded Oct 17, 2024
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 069180/0437 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2023
From: PARK, JAE-HYUNG; POTERA, RAHUL R.; STEINMANN, PHILIPP; JI, IN-HWAN
To: WOLFSPEED, INC.
Reel/Frame 065873/0817 →