SEMICONDUCTOR SUBSTRATE, MANUFACTURING METHOD FOR SEMICONDUCTOR SUBSTRATE, AND ELECTRONIC DEVICE HAVING SEMICONDUCTOR SUBSTRATE
Provided are a semiconductor substrate, a manufacturing method for a semiconductor substrate, and an electronic device including the semiconductor substrate, which are capable of preventing bubble formation of a resist due to expansion of air in an opening portion of a through hole and reducing a defect in plating which is a subsequent process. A semiconductor substrate according to the present disclosure has been configured such that, in a silicon or an interlayer film, any one is formed among: a through electrode including an upper hole portion formed in a forward tapered shape, a lower hole portion formed in a reverse tapered shape, and a step formed at a boundary between the upper hole portion and the lower hole portion; a through electrode including an upper hole portion formed in a forward tapered shape and formed to have a curved shape in a cross section of an opening portion, a lower hole portion formed in a reverse tapered shape, and a step formed at a boundary between the upper hole portion and the lower hole portion; and a through electrode including an upper hole portion formed in a forward tapered shape, a lower hole portion formed in a reverse tapered shape, and a boundary formed between the upper hole portion and the lower hole portion.
1 . A semiconductor substrate comprising a through electrode including:
an upper hole portion formed in a forward tapered shape;
a lower hole portion formed in a reverse tapered shape; and
a step formed at a boundary between the upper hole portion and the lower hole portion.
2 . A semiconductor substrate comprising a through electrode including:
an upper hole portion formed in a forward tapered shape and formed to have a curved shape in a cross section of an opening portion;
a lower hole portion formed in a reverse tapered shape; and
a step formed at a boundary between the upper hole portion and the lower hole portion.
3 . A semiconductor substrate comprising a through electrode including:
an upper hole portion formed in a forward tapered shape;
a lower hole portion formed in a reverse tapered shape; and
a boundary formed between the upper hole portion and the lower hole portion.
4 . The semiconductor substrate according to claim 1 , wherein the through electrode is bored in a silicon.
5 . The semiconductor substrate according to claim 1 , wherein the through electrode is bored in an interlayer film having an insulating property.
6 . The semiconductor substrate according to claim 1 , wherein the through electrode is bored in two or more interlayer films having an insulating property.
7 . The semiconductor substrate according to claim 1 , wherein the boundary or the step between the upper hole portion and the lower hole portion is disposed at a position in a depth direction of 20% to 50% from the opening surface with respect to a depth of the through electrode.
8 . The semiconductor substrate according to claim 5 , wherein the interlayer film having an insulating property is formed by a resin of an organic material or an inorganic material having photosensitivity.
9 . A manufacturing method for a semiconductor substrate, the manufacturing method comprising:
a process of forming a substrate on a wiring layer;
a process of boring a through hole having a reverse tapered shape in the silicon substrate or the interlayer film having an insulating property;
a process of forming an upper part of the through hole in a forward tapered shape;
a process of forming an insulating film on an inner peripheral surface of the through hole and an upper surface of the silicon substrate or the interlayer film having an insulating property;
a process of causing a bottom of the through hole to communicate with copper wiring of a wiring layer disposed below the silicon substrate or the interlayer film having an insulating property;
a process of forming a seed layer on an upper surface of the insulating film;
a process of applying a resist in a tenting state on an opening portion of the through hole and an upper surface of the silicon substrate or the interlayer film having an insulating property, and drying the resist;
a process of forming a resist pattern on an upper surface of the silicon substrate or the interlayer film having an insulating property; and
a process of forming a pattern by copper plating on an upper surface of the silicon substrate or the interlayer film having an insulating property, by using the resist pattern as a mask.
10 . An electronic device comprising any one semiconductor substrate among:
a semiconductor substrate including a through electrode including
an upper hole portion formed in a forward tapered shape,
a lower hole portion formed in a reverse tapered shape, and
a step formed at a boundary between the upper hole portion and the lower hole portion;
a semiconductor substrate including a through electrode including
an upper hole portion formed in a forward tapered shape and formed to have a curved shape in a cross section of an opening portion,
a lower hole portion formed in a reverse tapered shape, and
a step formed at a boundary between the upper hole portion and the lower hole portion; and
a semiconductor substrate including a through electrode including
an upper hole portion formed in a forward tapered shape,
a lower hole portion formed in a reverse tapered shape, and
a boundary formed between the upper hole portion and the lower hole portion.