IP Library Granted Patent US 12,451,213
Granted Patent B2
US 12,451,213 · App. 18/581,730 · Granted Oct 21, 2025

Optimized handling of neighbor plane disturb issues

Inventors: Robin Chalana (Bengaluru, IN); Ravi Dutt Sharma (Bengaluru, IN); Iyan Karkuvel Rajan Ayyathurai (Bengaluru, IN)
Assignee: Sandisk Technologies, Inc.
G11C29/886G11C29/1201G11C29/38
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Quick Facts
Patent No.
US 12,451,213
App. No.
18/581,730
Granted
Oct 21, 2025
Kind
B2
Abstract

Memory blocks of a metablock are analyzed and tested to determine whether multiple memory blocks fail a first fault assessment. If more than one memory block fails the first fault assessment, the memory blocks are assigned to a retry pool. When in the retry pool, a second fault assessment is performed on the memory blocks. If one or more of the memory blocks pass the second fault assessment, the memory blocks are placed in a memory block pool and are relinked to other memory blocks to form a new metablock. However, if one or more of the memory blocks fail the second fault assessment, the memory blocks are retired.

Claims (35)

1. A data storage device, comprising:

at least one memory die; and

a controller communicatively coupled to the at least one memory die and configured to:

access a metablock of the at least one memory die, wherein the metablock includes a plurality of memory blocks;

determine whether two or more memory blocks of the plurality of memory blocks have failed a first fault assessment;

based in part, on determining the two or more memory blocks have failed the first fault assessment, assign at least the two or more memory blocks of the plurality of memory blocks to a retry pool;

perform a second fault assessment on the at least the two or more memory blocks of the plurality of memory blocks assigned to the retry pool; and

make a fault determination on each of the at least the two or more memory blocks based, at least in part, on the second fault assessment.

2. The data storage device of claim 1 , wherein the controller is further configured to link at least one of the two or more memory blocks to another memory block to form a new metablock, wherein the relinking is based, at least in part, on the at least one of the two or more memory blocks passing the second fault assessment.

3. The data storage device of claim 1 , wherein the controller is further configured to retire at least one of the two or more memory blocks based, at least in part, on a determination that the at least one of the two or more memory blocks have failed the second fault assessment.

4. The data storage device of claim 1 , wherein the first fault assessment is a multiplane erase pass operation.

5. The data storage device of claim 1 , wherein the second fault assessment is a single plane erase pass operation.

6. The data storage device of claim 1 , wherein the first fault assessment is a foreground process.

7. The data storage device of claim 1 , wherein the controller is further configured to retire a memory block based, at least in part, on determining the memory block has failed the first fault assessment.

8. A data storage device, comprising:

a means for accessing a metablock of at least one memory die, wherein the metablock includes a plurality of memory blocks;

a means for determining whether at least two memory blocks of the plurality of memory blocks fail a first fault assessment;

a means for assigning the at least two memory blocks of the plurality of memory blocks to a retry pool;

a means for performing a second fault assessment on at least one memory block of the at least two memory blocks of the plurality of memory blocks assigned to the retry pool; and

a means for making a fault determination of the at least one memory block of the at least two memory blocks.

9. The data storage device of claim 8 , further comprising a means for relinking the at least one memory block of the at least two memory blocks to another memory block as part of a relinking operation.

10. The data storage device of claim 9 , wherein the relinking operation is performed based, at least in part, on an operating state of the data storage device.

11. The data storage device of claim 8 , further comprising a means for retiring the at least one memory block of the at least two memory blocks when the at least one memory block fails the second fault assessment.

12. The data storage device of claim 8 , wherein the first fault assessment is a multiplane erase pass operation.

13. The data storage device of claim 8 , wherein the second fault assessment is a single plane erase pass operation.

14. The data storage device of claim 8 , wherein the first fault assessment is a foreground process.

15. A method, comprising:

assigning a plurality of memory blocks to a retry pool, wherein the plurality of memory blocks in the retry pool have failed a first test;

performing a second test on the plurality of memory blocks assigned to the retry pool; and

linking the plurality of memory blocks together to create one or more new metablocks, each of the one or more new metablocks including a set number of memory blocks, wherein the plurality of memory blocks are linked based, at least in part, on the second test.

16. The method of claim 15 , further comprising retiring at least one memory block of the plurality of memory blocks when the at least one memory block fails the second test.

17. The method of claim 15 , wherein the first test is a multiplane erase pass operation.

18. The method of claim 15 , wherein the second test is a single plane erase pass operation.

19. The method of claim 15 , further comprising determining whether the plurality of memory blocks fails the first test.

20. The method of claim 15 , further comprising updating a memory table according to the one or more metablocks.

Assignments (7)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT (AR) Recorded May 15, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 067417/0329 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2024
From: CHALANA, ROBIN; SHARMA, RAVI DUTT; AYYATHURAI, IYAN KARKUVEL RAJAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 066501/0662 →
Continuity (1)
Related Publication 20250266119A1 · Aug 21, 2025
References Cited (2)
US 20120072807A1 · Cornwell · 2012 [cited by examiner]
US 20240143192A1 · Kim · 2024 [cited by examiner]