IP Library Granted Patent US 12,596,548
Granted Patent B2
US 12,596,548 · App. 18/583,195 · Granted Apr 7, 2026

Multiprocessor programming toolkit for design reuse

Inventors: Stephen E. Lim (Scotts Valley, CA); Viet N. Ngo (Austin, TX); Jeffrey M. Nicholson (Lakeville, MN); John Mark Beardslee (Menlo Park, CA); Teng-I Wang (Yorba Linda, CA); Zhong Qing Shang (Cupertino, CA); Michael Lyle Purnell (Scotts Valley, CA)
Assignee: HyperX Holdings LLC
G06F8/71G06F8/443G06F8/60
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,596,548
App. No.
18/583,195
Granted
Apr 7, 2026
Kind
B2
Abstract

Techniques for specifying and implementing a software application targeted for execution on a multiprocessor array (MPA). The MPA may include a plurality of processing elements, supporting memory, and a high bandwidth interconnection network (IN), communicatively coupling the plurality of processing elements and supporting memory. In some embodiments, software code may specify one or more cell definitions that include: program instructions executable to perform a function and one or more language constructs. The software code may further instantiate first, second, and third cell instances, each of which is an instantiation of one of the one or more cell definitions, where the instantiation includes configuration of the one or more language constructs such that: the first and second cell instances communicate via respective communication ports and the first and second cell instances are included in the third cell instance.

Claims (54)

1 . A non-transitory computer-readable medium that stores software code deployable on a multiprocessor array (MPA), wherein the software code comprises a set of program instructions that:

specify one or more cell definitions that include:

program instructions executable to perform a function; and

one or more language constructs which are user configurable to specify one or more parameter inputs; and

instantiate a first cell instance and one or more second cell instances, each of which is an instantiation of one of the one or more cell definitions, wherein the instantiation includes configuration of the one or more language constructs such that the one or more second cell instances are included in the first cell instance, wherein the one or more second cell instances are configured to communicate current hardware resource usage, and

wherein the instantiation of the first cell instance comprises an instantiation of a first cell definition of the one or more cell definitions that includes a first language construct that specifies a first parameter input, wherein the first parameter input comprises a numerical parameter, and wherein a total number of the one or more second cell instances corresponds to the numerical parameter.

2 . The non-transitory computer-readable medium of claim 1 ,

wherein the one or more language constructs are further user configurable to specify one or more communication ports,

wherein the first cell instance and the one or more second cell instances are instantiated according to the specified one or more communication ports.

3 . The non-transitory computer-readable medium of claim 2 , wherein the instantiation further includes configuration of the one or more language constructs such that a communication port of the first cell instance is coupled to communication ports of the one or more second cell instances.

4 . The non-transitory computer-readable medium of claim 2 , wherein the one or more communication ports are mappable to dynamic routing circuitry of the MPA that routes communications between processing elements of the MPA.

5 . The non-transitory computer-readable medium of claim 1 ,

wherein the one or more second cell instances comprise an instantiation of a second cell definition of the one or more cell definitions different from the first cell definition.

6 . The non-transitory computer-readable medium of claim 5 ,

wherein the one or more second cell instances are configured to execute the second cell definition in parallel.

7 . The non-transitory computer-readable medium of claim 1 , wherein different ones of the one or more second cell instances are instances of the same cell definition but are configured to use different amounts of hardware resources of the MPA.

8 . The non-transitory computer-readable medium of claim 1 , wherein the cell definition for the first cell instance specifies that it includes the one or more second cell instances.

9 . A method for configuring a multiprocessor array (MPA), wherein the MPA comprises hardware resources including a plurality of processors and a plurality of memories, the method comprising:

specifying one or more cell definitions that include:

program instructions executable to perform a function; and

one or more language constructs which are user configurable to specify one or more parameter inputs; and

instantiating a first cell instance and one or more second cell instances, each of which is an instantiation of one of the one or more cell definitions, wherein the instantiation includes configuration of the one or more language constructs such that the one or more second cell instances are included in the first cell instance, wherein the one or more second cell instances are configured to communicate current hardware resource usage, and

wherein the instantiation of the first cell instance comprises an instantiation of a first cell definition of the one or more cell definitions that includes a first language construct that specifies a first parameter input, wherein the first parameter input comprises a numerical parameter, and wherein a total number of the one or more second cell instances corresponds to the numerical parameter.

10 . The method of claim 9 ,

wherein the one or more language constructs are further user configurable to specify one or more communication ports,

wherein the first cell instance and the one or more second cell instances are instantiated according to the specified one or more communication ports, and

wherein the instantiation further includes configuration of the one or more language constructs such that a communication port of the first cell instance is coupled to communication ports of the one or more second cell instances.

11 . The method of claim 10 ,

wherein the one or more communication ports are mappable to dynamic routing circuitry of the MPA that routes communications between processing elements of the MPA.

12 . The method of claim 9 ,

wherein the one or more second cell instances comprise an instantiation of a second cell definition of the one or more cell definitions different from the first cell definition,

wherein the one or more second cell instances are configured to execute the second cell definition in parallel.

13 . The method of claim 9 , wherein different ones of the one or more second cell instances are instances of the same cell definition but are configured to use different amounts of hardware resources of the MPA.

14 . The method of claim 9 , further comprising:

dynamically adjusting an amount of hardware resources of the MPA that is assigned to the first cell instance.

15 . A system, comprising:

one or more processors; and

one or more memories having program instructions stored thereon that are executable to deploy software code on a multiprocessor array (MPA), wherein the software code comprises a set of program instructions that:

specify one or more cell definitions that include:

program instructions executable to perform a function; and

one or more language constructs which are user configurable to specify one or more parameter inputs; and

instantiate a first cell instance and one or more second cell instances, each of which is an instantiation of one of the one or more cell definitions, wherein the instantiation includes configuration of the one or more language constructs such that the one or more second cell instances are included in the first cell instance, wherein the one or more second cell instances are configured to communicate current hardware resource usage, and

wherein the instantiation of the first cell instance comprises an instantiation of a first cell definition of the one or more cell definitions that includes a first language construct that specifies a first parameter input, wherein the first parameter input comprises a numerical parameter, and wherein a total number of the one or more second cell instances corresponds to the numerical parameter.

16 . The system of claim 15 ,

wherein the one or more language constructs are further user configurable to specify one or more communication ports,

wherein the first cell instance and the one or more second cell instances are instantiated according to the specified one or more communication ports, and

wherein the instantiation further includes configuration of the one or more language constructs such that a communication port of the first cell instance is coupled to communication ports of the one or more second cell instances.

17 . The system of claim 15 ,

wherein the one or more second cell instances comprise an instantiation of a second cell definition of the one or more cell definitions different from the first cell definition, and

wherein the one or more second cell instances are configured to execute the second cell definition in parallel.

18 . The system of claim 15 ,

wherein different ones of the one or more second cell instances are instances of the same cell definition but are configured to use different amounts of hardware resources of the MPA.

19 . The system of claim 15 , wherein deploying the software code maps communication to dynamic routing circuitry of the MPA that is configured to route communications between processing elements of the MPA.

20 . The system of claim 15 , wherein the cell definition for the first cell instance specifies that it includes the one or more second cell instances.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2025
From: PACIFIC CAP ACQUISITION FUND, LLC
To: HYPERX HOLDINGS LLC
Reel/Frame 072342/0090 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2025
From: COHERENT LOGIX, INC.
To: PACIFIC CAP ACQUISITION FUND, LLC
Reel/Frame 072370/0394 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2025
From: LIM, STEPHEN E.; NGO, VIET N.; NICHOLSON, JEFFREY M.; BEARDSLEE, JOHN MARK; WANG, TENG-I; SHANG, ZHONG QING; PURNELL, MICHAEL LYLE
To: COHERENT LOGIX, INCORPORATED
Reel/Frame 071749/0440 →
Continuity (6)
Continuation 17513336 · Oct 28, 2021
Continuation 16818007 · Mar 13, 2020
Continuation 15872421 · Jan 16, 2018
Continuation 14047135 · Oct 7, 2013
Provisional Application 61722850 · Nov 6, 2012
Related Publication 20240394048A1 · Nov 28, 2024
References Cited (26)
US 5274818A · Vasilevsky et al. · 1993 [cited by applicant]
US 7415594B2 · Doerr · 2008 [cited by applicant]
US 8261270B2 · Papakipos et al. · 2012 [cited by applicant]
US 8473818B2 · Mangione-Smith et al. · 2013 [cited by applicant]
US 8495624B2 · Banerjee · 2013 [cited by applicant]
US 8918596B2 · Dice et al. · 2014 [cited by applicant]
US 9009660B1 · Griffin · 2015 [cited by applicant]
US 20030195938A1 · Howard · 2003 [cited by examiner]
US 20070226686A1 · Beardslee et al. · 2007 [cited by applicant]
US 20070294663A1 · McGuire et al. · 2007 [cited by applicant]
US 20080010631A1 · Harvey · 2008 [cited by examiner]
US 20080114937A1 · Reid · 2008 [cited by applicant]
US 20080235490A1 · Jones · 2008 [cited by applicant]
US 20090007125A1 · Barsness et al. · 2009 [cited by applicant]
US 20090077011A1 · Natarajan et al. · 2009 [cited by applicant]
US 20090172353A1 · Su et al. · 2009 [cited by applicant]
US 20090228684A1 · Ramesh · 2009 [cited by examiner]
US 20100107155A1 · Banerjee et al. · 2010 [cited by applicant]
US 20100235847A1 · Brehmer et al. · 2010 [cited by applicant]
US 20110088021A1 · Kruglick · 2011 [cited by applicant]
US 20110219343A1 · Eng · 2011 [cited by applicant]
US 20120137119A1 · Doerr · 2012 [cited by applicant]
US 20130081044A1 · Sandstrom · 2013 [cited by applicant]
US 20130191837A1 · Abeles et al. · 2013 [cited by applicant]
US 20140007044A1 · Aliseychik · 2014 [cited by applicant]
US 20140137082A1 · Ellis et al. · 2014 [cited by applicant]