IP Library Granted Patent US 12,405,434
Granted Patent B2
US 12,405,434 · App. 18/584,748 · Granted Sep 2, 2025

Embedding a photonic integrated circuit in a semiconductor package for high bandwidth memory and compute

Inventors: Ankur Aggarwal (Pleasanton, CA); Subal Sahni (Santa Clara, CA); Philip Winterbottom (San Jose, CA); Martinus Bos (San Jose, CA)
Assignee: Celestial AI Inc.
G02B6/4283G02B6/12002G02B6/124G02B6/13G02B6/42G02B6/4213G02B6/4214G02B6/4226G02B6/4239G02B6/4259G02B6/428G02B6/4293G02B6/43H01L21/56H01L25/167G02B2006/12107H10B80/00
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Quick Facts
Patent No.
US 12,405,434
App. No.
18/584,748
Granted
Sep 2, 2025
Kind
B2
Abstract

A package includes a photonic integrated circuit (PIC) disposed on a substrate and comprising a semiconductor die hosting an active portion and a passive portion mutually coupled, the active portion being configured to consume electrical power when activated, and the passive portion comprising an optical transmission medium configured to propagate an optical signal to or from the active portion of the PIC; an electronic integrated circuit (EIC) electrically coupled to the active portion of the PIC and comprising components that electrically operate on the active portion of the PIC; and a packaging compound at least partially encapsulating the PIC, the packaging compound defining a cavity on a side of the semiconductor die that is opposite from the substrate, the cavity being filled with an optically transparent medium such that the optical signal can be received from or transmitted to the passive portion of the PIC through the cavity.

Claims (19)

1. A method for embedding a photonic integrated circuit (PIC) in a package comprising the PIC and at least one electronic integrated circuit (EIC), the PIC comprising an active portion which consumes electrical power when the PIC is activated and a passive portion comprising an optical transmission medium configured to propagate an optical signal to or from the active portion, the method comprising:

masking a portion of a surface of the PIC with a masking material, the portion corresponding to one or more photonic ports in the passive portion of the PIC;

depositing a layer of a molding material to at least partially encase the PIC including the masking material;

removing a portion of the layer of the molding material sufficient to expose the masking material;

removing the masking material from the surface of the PIC to provide a cavity in the molding material, the cavity exposing the one or more photonic ports;

filling the cavity with an optically transparent medium such that the optical signal can be received or transmitted through the cavity;

disposing the PIC on a glass carrier

peeling off the glass carrier; and

after peeling off the glass carrier, mounting the package on a printed circuit board (PCB).

2. The method of claim 1 , wherein filling the cavity comprises:

introducing a volume of a curable material into the cavity such that the cavity is at least partially filled; and

curing the curable material in the cavity to provide an optically transparent window in the cavity, wherein the curable material is an ultraviolet curable epoxy.

3. The method of claim 2 , further comprising:

aligning an optical interface with the passive portion of the PIC such that the optical signal can be received from or transmitted to the optical interface through the optically transparent window in the cavity, wherein the optical interface is a fiber attach unit (FAU);

disposing a coupler between the optical interface and cavity to couple the optical signal from the optical interface to one of the photonic ports, wherein the coupler comprises at least one of a grating coupler or an edge coupler; and

coupling the optical interface to at least one of a light engine or an optical interface on another package.

4. The method of claim 1 , wherein the layer of molding material is 100 μm or less in thickness.

5. The method of claim 1 , further comprising:

providing, in the package, a high-bandwidth memory (HBM), and a processor, wherein the at least one EIC bridges the PIC to the HBM and the processor.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Feb 13, 2026
From: CELESTIAL AI INC.; SICILY MERGER SUB II, INC.
To: SICILY MERGER SUB II, INC.
Reel/Frame 073788/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2025
From: AGGARWAL, ANKUR; SAHNI, SUBAL; WINTERBOTTOM, PHILIP; BOS, MARTINUS
To: CELESTIAL AI INC.
Reel/Frame 071414/0956 →
Continuity (3)
Continuation 18583749 · Feb 21, 2024
Provisional Application 63616465 · Dec 29, 2023
Related Publication 20250216632A1 · Jul 3, 2025
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