IP Library Granted Patent US 12,622,275
Granted Patent B2
US 12,622,275 · App. 18/616,351 · Granted May 5, 2026

Semiconductor package having cooling systems with flow control devices within substrates

Inventors: Seungwon Im (Bucheon-si, KR); Oseob Jeon (Seoul, KR); Byoungok Lee (Yeonsu-gu, KR); Yoonsoo Lee (Incheon, KR); Joonseo Son (Seoul, KR); Dukyong Lee (Bucheon, KR); Changyoung Park (Ilsan-si, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/433H01L23/13H01L23/4334H01L23/473H01L23/49568H01L23/49861H01L25/0657H01L23/24H01L2224/33
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Quick Facts
Patent No.
US 12,622,275
App. No.
18/616,351
Granted
May 5, 2026
Kind
B2
Abstract

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

Claims (26)

1 . A semiconductor package comprising:

a first cover coupled to a first substrate, the first substrate coupled to a first die;

a first cooling system comprised within the first substrate;

a second cover coupled to a second substrate, the second substrate coupled to a second die;

a second cooling system comprised within the second substrate; and

a spacer coupled between a surface on the first die facing the second substrate and a surface of the second die facing the first substrate;

wherein the first cooling system and the second cooling system each comprise a flow control device configured to induce turbulent flow of a cooling medium passing through the first cooling system and the second cooling system.

2 . The semiconductor package of claim 1 , wherein the flow control device comprises a heat slug with fins.

3 . The semiconductor package of claim 1 , wherein the spacer is directly coupled to the first die and the second die.

4 . The semiconductor package of claim 1 , wherein the each of the first substrate and the second substrate comprise an outer layer directly coupled to a dielectric layer.

5 . The semiconductor package of claim 4 , wherein the first substrate comprises a patterned layer directly coupled between the dielectric layer and the first die.

6 . The semiconductor package of claim 1 , wherein the first cover and the second cover comprise a water jacket.

7 . The semiconductor package of claim 1 , wherein the first cover and the second cover each comprises nickel plated copper.

8 . A semiconductor package comprising:

a first cover coupled to a first substrate, the first substrate comprising an outer layer, the first substrate coupled to a first die;

a first cooling system comprised within the outer layer;

a second cover coupled to a second substrate, the second substrate comprising a second outer layer, the second substrate coupled to a second die;

a second cooling system comprised within the second outer layer; and

a spacer coupled between the first die and the second die;

wherein the first substrate comprises a dielectric layer directly coupled to the outer layer and the second substrate comprises a second dielectric layer directly coupled to the second outer layer; and

wherein the first cooling system and the second cooling system each comprise a flow control device configured to induce turbulent flow of a cooling medium passing through the first cooling system and the second cooling system.

9 . The semiconductor package of claim 8 , wherein the flow control device comprises a heat slug with fins.

10 . The semiconductor package of claim 8 , wherein the spacer is directly coupled between a surface of the first die facing the second substrate and a surface of the second die facing the first substrate.

11 . The semiconductor package of claim 8 , wherein the first substrate comprises a patterned layer directly coupled between the dielectric layer and the first die.

12 . The semiconductor package of claim 8 , wherein the first cover and the second cover comprise a water jacket.

13 . The semiconductor package of claim 8 , wherein the first cover and the second cover each comprises nickel plated copper.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2024
From: IM, SEUNGWON; JEON, OSEOB; LEE, BYOUNGOK; LEE, YOONSOO; LEE, DUKYONG; SON, JOONSEO; PARK, CHANGYOUNG
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 066896/0479 →
Continuity (5)
Division 17457100 · Dec 1, 2021
Division 16790933 · Feb 14, 2020
Division 15714539 · Sep 25, 2017
Provisional Application 62491948 · Apr 28, 2017
Related Publication 20240234246A1 · Jul 11, 2024
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