Systems and methods for controlling multi-level diode-clamped inverters using space vector pulse width modulation (SVPWM)
Control systems for a multi-level diode-clamped inverter and corresponding methods include a processor and a digital logic circuit forming a hybrid controller. The processor identifies sector and region locations based on a sampled reference voltage vector V* and angle θ e *. The processor then selects predefined switching sequences and pre-calculated turn-on time values based on the identified sector and region locations. The digital logic circuit generates PWM switching signals for driving power transistors of a multi-level diode-clamped inverter based on the turn-on time values and the selected switching sequences. The control system takes care of the existing capacitor voltage balancing issues of multi-level diode-clamped inverters while supplying both active and reactive power to an IT load. Using the control system, one can generate a symmetrical PWM signal that fully covers the linear under-modulation region.
1 . A control system for a multi-level inverter, comprising:
a processor;
a memory having stored thereon instructions, which, when executed by the processor, causes the processor to:
receive a reference voltage vector and an associated angle;
determine an operational parameter of the multi-level inverter based on the reference voltage vector and the associated angle;
select a switching sequence and corresponding turn-on time values for switching states based on the determined operational parameter; and
generate pulse width modulation (PWM) switching signals based on the selected switching sequence and the corresponding turn-on time values, the switching signals driving power transistors of the multi-level inverter in a modulation region of the multi-level inverter.
2 . The control system of claim 1 , wherein the operational parameter is a region.
3 . The control system of claim 1 , further comprising a counter configured to count from 0 to Ts/2 and then from Ts/2 to 0, where Ts is a sampling period.
4 . The control system of claim 1 , wherein the circuit is implemented by a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), or a combination thereof.
5 . The control system of claim 1 , wherein the processor and the memory are implemented by a digital signal processor (DSP).
6 . The control system of claim 1 , wherein the instructions, when executed by the processor, further cause the processor to:
convert the reference voltage vector and the associated angle into X and Y coordinate point values; and
identify the region based on X and Y coordinate point values.
7 . The control system of claim 6 , wherein the determining the region includes comparing the X and Y coordinate point values to geometric inequalities that define triangular regions in a vector space.
8 . The control system of claim 6 , wherein the switching sequence and the corresponding turn-on time values are predetermined for each region.
9 . The control system of claim 1 , wherein the switching sequence and the corresponding turn-on time values are stored in a look-up table.
10 . A method of controlling a multi-level inverter, comprising:
receiving a reference voltage vector and an associated angle;
determining an operational parameter of the multi-level inverter based on the reference voltage vector and the associated angle;
selecting a switching sequence and corresponding turn-on time values for switching states based on the determined operational parameter; and
generating pulse width modulation (PWM) switching signals based on the selected switching sequence and the corresponding turn-on time values, the switching signals driving power transistors of the multi-level inverter in a modulation region of the multi-level inverter.
11 . The method of claim 10 , wherein the operational parameter is a region.
12 . The method of claim 10 , further comprising:
converting the reference voltage vector and the associated angle into X and Y coordinate point values; and
identifying the region based on X and Y coordinate point values.
13 . The method of claim 12 , wherein the identifying the region includes comparing the X and Y coordinate point values to, geometric inequalities that define triangular regions in a vector space.
14 . The method of claim 10 , wherein the switching sequence and the corresponding turn-on time values are predetermined for each region.
15 . The method of claim 10 , wherein the switching sequence and the corresponding turn-on time values are stored in a look-up table stored in a memory.
16 . An energy storage system comprising:
an energy storage system;
a DC-DC converter coupled to the energy storage system;
a multi-level inverter coupled to the DC-DC converter; and
a controller for the multi-level inverter, the controller comprising:
a processor;
a memory having stored thereon instructions, which, when executed by the processor, causes the processor to:
receive a reference voltage vector and an associated angle;
determine an operational parameter of the multi-level inverter based on the reference voltage vector and the associated angle;
select a switching sequence and corresponding turn-on time values for switching states based on the determined operational parameter; and
generate pulse width modulation (PWM) switching signals based on the selected switching sequence and the corresponding turn-on time values, the switching signals driving power transistors of the multi-level inverter in a modulation region of the multi-level inverter.
17 . The control system of claim 1 , wherein the circuit is further configured to:
compare each turn-on time value to a counter signal to generate comparison signals;
invert at least one of the comparison signals; and
perform logical AND operations on selected combinations of inverted and non-inverted comparison signals to generate the PWM switching signals.
18 . The control system of claim 1 , wherein the selecting of the switching sequence and corresponding turn-on time values is further based on a predefined operational mode, each predefined operational mode corresponding to a group of regions within a vector space of the multi-level inverter.
19 . The control system of claim 1 , wherein PWM signal is a symmetrical PWM signal.