IP Library › Granted Patent US 12,469,633
Granted Patent B2
US 12,469,633 · App. 18/673,292 · Granted Nov 11, 2025

Inductor device

Inventors: Hsiao-Tsung Yen (Hsinchu, TW); Ka-Un Chan (Hsinchu, TW)
Assignee: Realtek Semiconductor Corporation
H01F27/2804H01F17/0013H01F27/2828H01F27/29H01F2017/004H01F2017/0073H01F2027/2809H01F2027/2819
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Quick Facts
Patent No.
US 12,469,633
App. No.
18/673,292
Granted
Nov 11, 2025
Kind
B2
Abstract

An inductor device includes a first trace, a second trace, a third trace, a fourth trace, and a double ring inductor. The first trace is disposed in a first area, and located on a first layer. The second trace is disposed in the first area, coupled to the first trace, and located on a second layer. The third trace is disposed in a second area, and located on the first layer. The fourth trace is disposed in the second area, coupled to the third trace, and located on the second layer. The double ring inductor is disposed on the first layer, located at outer side of the first trace and the third trace, and coupled to the first trace and the third trace.

Claims (29)

1 . An inductor device, comprising:

a first trace disposed in a first area, and located on a first layer;

a second trace disposed in the first area, coupled to the first trace, and located on a second layer;

a third trace disposed in a second area, and located on the first layer;

a fourth trace disposed in the second area, coupled to the third trace, and located on the second layer; and

a double ring inductor disposed on the first layer, located at an outside of the first trace and the third trace, and coupled to the first trace and the third trace, wherein the double ring inductor comprises:

a fifth trace disposed in the first area, and coupled to the first trace;

a sixth trace disposed in the second area, and coupled to the third trace;

a first connector coupled to the fifth trace and the sixth trace at a first side of the inductor device; and

a second connector coupled to the fifth trace and the sixth trace at a second side of the inductor device;

wherein the second trace comprises at least one wire, and the second trace and the fifth trace are partially overlapped with each other at the first side and the second side.

2 . The inductor device of claim 1 , wherein the fifth trace and the sixth trace are coupled to each other at a junction of the first area and the second area.

3 . The inductor device of claim 2 , wherein the fifth trace and the sixth trace are coupled to each other in at least two locations at the junction.

4 . The inductor device of claim 3 , wherein the double ring inductor further comprises:

a first input/output terminal disposed at the fifth trace.

5 . The inductor device of claim 4 , wherein the first connector is disposed on the second layer, and crosses the first input/output terminal.

6 . The inductor device of claim 5 , wherein the double ring inductor further comprises:

a second input/output terminal disposed at the sixth trace.

7 . The inductor device of claim 6 , wherein the second connector is disposed on the second layer, and crosses the second input/output terminal.

8 . The inductor device of claim 3 , wherein the fifth trace comprises a plurality of first sub-wires, and the first sub-wires are coupled to each other at the junction in an interlaced manner.

9 . The inductor device of claim 8 , wherein the sixth trace comprises a plurality of second sub-wires, and the second sub-wires are coupled to each other at the junction in an interlaced manner.

10 . The inductor device of claim 9 , wherein the first sub-wires are coupled to each other at a third side which is opposite to the junction in an interlaced manner.

11 . The inductor device of claim 10 , wherein the second sub-wires are coupled to each other at a fourth side which is opposite to the junction in an interlaced manner.

12 . The inductor device of claim 9 , wherein the fifth trace is coupled to the second trace through a first connection.

13 . The inductor device of claim 9 , wherein the fourth trace comprises at least one wire, and the fourth trace and the sixth trace are partially overlapped with each other at the first side and the second side.

14 . The inductor device of claim 13 , wherein the second trace and the fifth trace are overlapped with each other at a third side which is opposite to the junction.

15 . The inductor device of claim 14 , wherein the fourth trace and the sixth trace are overlapped with each other at a fourth side which is opposite to the junction.

16 . The inductor device of claim 9 , wherein the first trace and the second trace are partially overlapped with each other, and the third trace and the fourth trace are partially overlapped with each other.

17 . The inductor device of claim 1 , wherein the first trace located on the first layer and the second trace located on the second layer are stacked to each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2024
From: YEN, HSIAO-TSUNG; CHAN, KA-UN
To: REALTEK SEMICONDUCTOR CORPORATION
Reel/Frame 067530/0910 →
Priority Claims (1)
TW 109106957 · Mar 3, 2020 · national
Continuity (4)
Division 16829112 · Mar 25, 2020
Provisional Application 62871263 · Jul 8, 2019
Provisional Application 62826286 · Mar 29, 2019
Related Publication 20240312691A1 · Sep 19, 2024
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