Caching lookup tables for block family error avoidance
In some implementations, a memory device may cache a subset of one or more block family error avoidance (BFEA) lookup tables associated with a block family associated with host data in a first memory location. The block family may be based on at least one of a time window during which the host data was written or a temperature window at which the host data was written. The memory device may receive a read command associated with host data and determine, based on the block family and the subset of the one or more BFEA tables, a threshold voltage offset associated with the host data. The memory device may compute a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the host data. The memory device may read, using the modified threshold voltage, the host data from the first memory location.
1 . A memory device, comprising:
one or more components configured to:
receive a read command for host data associated with a first memory location that stores a subset of one or more block family error avoidance (BFEA) tables that are stored at a second memory location,
wherein the host data is associated with a block family;
read, using a modified threshold voltage, the host data from the first memory location,
wherein the modified threshold voltage is based on applying a threshold voltage offset, determined based on the subset of the one or more BFEA tables, to a base read level voltage associated with the host data;
determine, based on a period of time elapsing, to update threshold voltage offset information associated with the block family; and
update the threshold voltage offset information based on updating the one or more BFEA tables.
2 . The memory device of claim 1 , wherein a block family identifier corresponding to the host data is associated with the threshold voltage offset.
3 . The memory device of claim 1 , wherein the one or more components are further configured to:
receive another read command associated with additional host data; and
read, using another modified threshold voltage, the host data from the first memory location.
4 . The memory device of claim 3 , wherein the one or more components are further configured to:
determine, based on the subset of the one or more BFEA tables, another threshold voltage offset associated with the additional host data; and
compute the other modified threshold voltage by applying the other threshold voltage offset to the base read level voltage.
5 . The memory device of claim 1 , wherein the block family includes a plurality of blocks associated with a same time window or a same temperature window.
6 . The memory device of claim 1 , wherein the subset of the one or more BFEA tables includes a first subset of a block partition table and a second subset of a block family table.
7 . A memory device, comprising:
memory; and
a plurality of controllers coupled to the memory and configured to:
write host data to a first memory location of the memory based on a write command;
store, in one or more block family error avoidance (BFEA) lookup tables associated with a second memory location of the memory, information associating the host data with a block family and associating a threshold voltage offset with the block family, wherein the one or more BFEA lookup tables are associated with multiple block families;
cache a subset of the one or more BFEA lookup tables in the first memory location;
determine, based on a period of time elapsing, to update threshold voltage offset information associated with the block family; and
update the threshold voltage offset information based on updating the one or more BFEA lookup tables.
8 . The memory device of claim 7 , wherein the host data is associated with the block family based on a time window associated with writing the host data or a temperature window associated with writing the host data.
9 . The memory device of claim 8 , wherein the block family includes a plurality of blocks associated with the time window or the temperature window.
10 . The memory device of claim 7 , wherein the threshold voltage offset is associated with the block family based on a time window associated with writing the host data or a temperature window associated with writing the host data.
11 . The memory device of claim 7 , wherein the plurality of controllers is further configured to:
read, using a modified threshold voltage, the host data from the first memory location,
wherein the modified threshold voltage is based on applying the threshold voltage offset to a base read level voltage associated with the host data.
12 . The memory device of claim 7 , wherein the plurality of controllers is further configured to:
receive an indication that the threshold voltage offset information has been updated; and
update the subset of the one or more BFEA lookup tables based on the updated threshold voltage offset information.
13 . The memory device of claim 7 , wherein the subset of the one or more BFEA tables includes a first subset of a block partition table and a second subset of a block family table.
14 . A method, comprising:
writing, by one or more controllers of a memory device, host data to a memory location associated with the memory device;
storing, by the one or more controllers and in one or more block family error avoidance (BFEA) lookup tables, information associating the host data with a block family and associating a threshold voltage offset with the block family;
determining, by the one or more controllers and based on a period of time elapsing, to update threshold voltage offset information associated with the block family; and
updating, by the one or more controllers, the threshold voltage offset information by updating the one or more BFEA lookup tables.
15 . The method of claim 14 , wherein: the host data is associated with the block family based on a time window associated with writing the host data or a temperature window associated with writing the host data; and
the threshold voltage offset is associated with the block family based on the time window or the temperature window.
16 . The method of claim 14 , further comprising: reading, using a modified threshold voltage, the host data from the memory location,
wherein the modified threshold voltage is based on applying the threshold voltage offset to a base read level voltage associated with the host data.
17 . The method of claim 16 , further comprising: determining, based on the block family and a subset of the one or more BFEA lookup tables cached in the memory location, the threshold voltage offset,
wherein the modified threshold voltage is based on determining the threshold voltage offset.
18 . The method of claim 14 , wherein the one or more BFEA lookup tables are associated with a second memory location.
19 . The method of claim 14 , further comprising: caching a subset of the one or more BFEA lookup tables in the memory location.
20 . The method of claim 19 , wherein the subset of the one or more BFEA tables includes a first subset of a block partition table and a second subset of a block family table.