Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code
Certain aspects of the present disclosure provide low-density parity-check (LDPC) codes having pairwise orthogonality of adjacent rows, and a new decoder that exploits the pairwise row orthogonality for flexible decoder scheduling without performance loss. An apparatus includes a receiver configured to receive a codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the receiver. The apparatus includes at least one processor coupled with a memory and comprising decoder circuitry configured to decode the codeword based on a LDPC code to produce a set of information bits. The LDPC code is stored in the memory and defined by a base matrix having columns in which all adjacent rows are orthogonal in a last portion of the rows.
1 . An apparatus for wireless communication, comprising:
a receiver configured to receive a codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the receiver; and
at least one processor coupled with a memory and comprising decoder circuitry configured to decode the codeword based on a low density parity check (LDPC) code to produce a set of information bits, wherein:
the LDPC code is stored in the memory and defined by a base matrix having a first number of columns corresponding to variable nodes of a base graph and a second number of rows corresponding to check nodes of the base graph, and
for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows.
2 . The apparatus of claim 1 , wherein entries in the base matrix correspond to an edge between the variable node and the check node, of the base graph, associated with the entry in base matrix.
3 . The apparatus of claim 2 , wherein entries in the base matrix include cyclic integer lifting values.
4 . The apparatus of claim 2 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.
5 . The apparatus of claim 1 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.
6 . The apparatus of claim 1 , wherein the memory is configured to store at least a portion of the LDPC code.
7 . The apparatus of claim 1 , wherein the at least one processor includes a layered decoder.
8 . The apparatus of claim 1 , wherein the at least one processor is configured to decode the codeword based on a decoding schedule.
9 . The apparatus of claim 8 , wherein the decoding schedule includes decoding the codeword based on the LDPC code by decoding sequentially row by row in the base matrix or by simultaneously decoding pairs of rows in the base matrix.
10 . The apparatus of claim 9 , wherein the at least one processor is configured to select from two combinations of two rows from any three sequential rows in the last portion for the simultaneous decoding pairs of the decoding schedule.
11 . The apparatus of claim 9 , wherein the row by row or pairs of rows is performed column by column.
12 . The apparatus of claim 8 , wherein the decoding schedule includes skipping decoding portions of the base matrix that do not contain an associated entry.
13 . The apparatus of claim 1 , wherein the LDPC code comprises a lifted LDPC code.
14 . The apparatus of claim 1 , wherein:
the codeword comprises a punctured codeword,
the at least one processor further comprises a depuncturer configured to depuncture the codeword, and
the decoding comprises decoding the depunctured codeword.
15 . An apparatus for wireless communication, comprising:
at least one processor coupled with a memory and comprising an encoder circuit configured to encode a set of information bits based on a low density parity check (LDPC) code to produce a codeword wherein:
the LDPC code is stored in the memory and defined by a base matrix having a first number of columns corresponding to variable nodes of a base graph and a second number of rows corresponding to check nodes of the base graph, and
for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows; and
a transmitter configured to transmit the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements arranged proximal the transmitter.
16 . The apparatus of claim 15 , wherein entries in the base matrix correspond to an edge between the variable node and the check node, of the base graph, associated with the entry in base matrix.
17 . The apparatus of claim 16 , wherein entries in the base matrix are replaced cyclic integer lifting values.
18 . The apparatus of claim 16 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.
19 . The apparatus of claim 15 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.
20 . The apparatus of claim 15 , wherein:
the at least one processor is configured to lifted the LDPC code by generating an integer number of copies of the base matrix; and
the LDPC code comprises a lifted LDPC code.
21 . The apparatus of claim 15 , wherein:
the at least one processor further comprises a puncturer configured to puncture the codeword, and
the transmitting the codeword comprises transmitting the punctured codeword.
22 . A method for wireless communication, comprising:
receiving a codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal a receiver; and
decoding the codeword via decoder circuitry based on a low density parity check (LDPC) code to produce a set of information bits, wherein:
the LDPC code is stored and defined by a base matrix having a first number of columns corresponding to variable nodes of a base graph and a second number of rows corresponding to check nodes of the base graph, and
for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows.
23 . The method of claim 22 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.
24 . The method of claim 22 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.
25 . The method of claim 22 , wherein:
the decoding is based on a decoding schedule; and
the decoding schedule includes decoding the codeword based on the LDPC code by decoding sequentially row by row in the base matrix or by simultaneously decoding pairs of rows in the base matrix.
26 . The method of claim 25 , further comprising selecting from two combinations of two rows from any three sequential rows in the last portion for the simultaneous decoding pairs of the decoding schedule.
27 . A method for wireless communication, comprising:
encoding a set of information bits with encoder circuitry based on a low density parity check (LDPC) code to produce a codeword wherein:
the LDPC code is defined by a base matrix having a first number of columns corresponding to variable nodes of a base graph and a second number of rows corresponding to check nodes of the base graph, and
for each of the first number of columns, all adjacent rows are orthogonal in a last portion of the second number of rows; and
transmitting the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements.
28 . The method of claim 27 , wherein in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry.
29 . The method of claim 27 , wherein the last portion of the rows comprises at least the bottom twenty-one rows of the base matrix.
30 . The method of claim 27 , further comprising puncturing the codeword, wherein transmitting the codeword comprises transmitting the punctured codeword.
31. An apparatus for wireless communication, the apparatus comprising:
a receiver configured to receive a codeword; and
at least one processor coupled with a memory and configured to decode the codeword based on a low density parity check (LDPC) code to produce a set of information bits, wherein:
the LDPC code is based on a base matrix and a lifting factor Z;
the base matrix comprises sixty-eight columns indexed by column indices j=0-67 and forty-six rows indexed by row indices i=0-45;
elements in the base matrix are represented by the row indices i and the column indices j; and
the elements in the base matrix are zero elements except for the elements: i=25, j=1, 6, 7, 14, and 47; i=26, j=0, 2, 4, 15, and 48; i=27, j=1, 6, 8, and 49; i=28, j=0, 4, 19, 21, and 50; i=29, j=1, 14, 18, 25, and 51; i=30, j=0, 10, 13, 24, and 52; i=31, j=1, 7, 22, 25, and 53; i=32, j=0, 12, 14, 24, and 54; i=33, j=1, 2, 11, 21, and 55; i=34, j=0, 7, 15, 17, and 56; i=35, j=1, 6, 12, 22, and 57; i=36, j=0, 14, 15, 18, and 58; i=37, j=1, 13, 23, and 59; i=38, j=0, 9, 10, 12, and 60; i=39, j=1, 3, 7, 19, and 61; i=40, j=0, 8, 17, and 62; i=41, j=1, 3, 9, 18, and 63; i=42, j=0, 4, 24, and 64; i=43, j=1, 16, 18, 25, and 65; i=44, j=0, 7, 9, 22, and 66; and i=45, j=1, 6, 10, and 67.
32. The apparatus of claim 31 , wherein each element in the base matrix corresponds to an edge between a variable node and a check node of a base graph associated with the base matrix.
33. The apparatus of claim 32 , wherein:
each zero element in the base matrix is replaced by a Z x Z all zero matrix; and
each non-zero element in the base matrix is replaced by a Z x Z permutation matrix based on a cyclic integer lifting value.
34. The apparatus of claim 31 , wherein the memory is configured to store at least a portion of the LDPC code or base matrix.
35. The apparatus of claim 31 , wherein the at least one processor is configured to decode the codeword based on a decoding schedule.
36. The apparatus of claim 35 , wherein the at least one processor is configured to decode the codeword sequentially row by row in the base matrix or to simultaneously decode pairs of rows in the base matrix based on the decoding schedule.
37. The apparatus of claim 36 , wherein the at least one processor is configured to select a combination of two rows from any three sequential rows in the last twenty-one rows indexed by the row indices i=25-45 to simultaneously decode.
38. The apparatus of claim 36 , wherein the at least one processor is further configured to decode sequentially column by column in the base matrix.
39. The apparatus of claim 35 , wherein the at least one processor is further configured to skip decoding the zero elements of the base matrix.
40. The apparatus of claim 31 , wherein the LDPC code comprises a lifted LDPC code.
41. The apparatus of claim 31 , wherein:
the codeword comprises a punctured codeword; and
the at least one processor comprises a depuncturer configured to depuncture the codeword.
42. The apparatus of claim 31 , wherein:
the at least one processor is configured to select pairs of rows from any three sequential rows in the last twenty-one rows indexed by the row indices i=25-45; and
the at least one processor comprises decoder circuitry configured to simultaneously decode each pair of rows.
43. The apparatus of claim 31 , wherein the first column indexed by the column index j=0 and the second column indexed by the column index j=1 have a highest degree among the sixty-eight columns.
44. The apparatus of claim 43 , wherein the first column indexed by the column index j=0 and the second column indexed by the column index j=1 have a highest number of non-zero elements among the sixty-eight columns.
45. The apparatus of claim 44 , wherein:
the codeword comprises a punctured codeword; and
the at least one processor comprises a depuncturer configured to depuncture systematic bits corresponding to the first column indexed by the column index j=0 and the second column indexed by the column index j=1.
46. The apparatus of claim 31 , wherein the receiver is configured to receive the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the receiver.
47. An apparatus for wireless communication, the apparatus comprising:
at least one processor coupled with a memory and configured to encode a set of information bits based on a low density parity check (LDPC) code to produce a codeword, wherein:
the LDPC code is based on a base matrix and a lifting factor Z;
the base matrix comprises sixty-eight columns indexed by column indices j=0-67 and forty-six rows indexed by row indices i=0-45;
elements in the base matrix are represented by the row indices i and the column indices j; and
the elements in the base matrix are zero elements except for the elements: i=25, j=1, 6, 7, 14, and 47; i=26, j=0, 2, 4, 15, and 48; i=27, j=1, 6, 8, and 49; i=28, j=0, 4, 19, 21, and 50; i=29, j=1, 14, 18, 25, and 51; i=30, j=0, 10, 13, 24, and 52; i=31, j=1, 7, 22, 25, and 53; i=32, j=0, 12, 14, 24, and 54; i=33, j=1, 2, 11, 21, and 55; i=34, j=0, 7, 15, 17, and 56; i=35, j=1, 6, 12, 22, and 57; i=36, j=0, 14, 15, 18, and 58; i=37, j=1, 13, 23, and 59; i=38, j=0, 9, 10, 12, and 60; i=39, i=1, 3, 7,19, and 61; i=40, i=0, 8,17, and 62; i=41, j=1, 3, 9, 18, and 63; i=42, i=0, 4, 24, and 64; i=43, i=1, 16, 18, 25, and 65; i=44, i=0, 7, 9, 22, and 66; and i=45, j=1, 6, 10, and 67; and
a transmitter configured to transmit the codeword.
48. The apparatus of claim 47 , wherein each element in the base matrix corresponds to an edge between a variable node and a check node of a base graph associated with the base matrix.
49. The apparatus of claim 48 , wherein:
each zero element in the base matrix is replaced by a Z x Z all zero matrix; and
each non-zero element in the base matrix is replaced by a Z x Z permutation matrix based on a cyclic integer lifting value.
50. The apparatus of claim 47 , wherein the at least one processor is further configured to generate Z copies of the base matrix to lift the LDPC code.
51. The apparatus of claim 47 , wherein:
the at least one processor further comprises a puncturer configured to puncture the codeword: and
the transmitter is configured to transmit the punctured codeword.
52. The apparatus of claim 47 , wherein:
the at least one processor is configured to select pairs of rows from any three sequential rows in the last twenty-one rows having the row indices i=25-45; and
the at least one processor comprises encoder circuitry configured to simultaneously encode each pair of rows.
53. The apparatus of claim 47 , wherein the first column indexed by the column index j=0 and the second column indexed by the column index j=1 have a highest degree among the sixty-eight columns.
54. The apparatus of claim 53 , wherein the first column indexed by the column index j=0 and the second column indexed by the column index j=1 have a highest number of non-zero elements among the sixty-eight columns.
55. The apparatus of claim 47 , wherein the transmitter is configured to transmit the codeword in accordance with a radio technology across a wireless channel via one or more antenna elements situated proximal the transmitter.
56. A method for wireless communication, the method comprising:
receiving a codeword; and
decoding the codeword based on a low density parity check (LDPC) code to produce a set of information bits, wherein:
the LDPC code is based on a base matrix and a lifting factor Z;
the base matrix comprises sixty-eight columns indexed by column indices i=0-67 and forty-six rows indexed by row indices i=0-45;
elements in the base matrix are represented by the row indices i and the column indices j. and
the elements in the base matrix are zero elements except for the elements: i=25, j=1, 6, 7, 14, and 47; i=26, j=0, 2, 4, 15, and 48; i=27, j=1, 6, 8, and 49; i=28, j=0, 4, 19, 21, and 50; i=29, j=1, 14, 18, 25, and 51; i=30, j=0, 10, 13, 24, and 52; i=31, j=1, 7, 22, 25, and 53; i=32, j=0, 12, 14, 24, and 54; i=33, j=1, 2, 11, 21, and 55; i=34, j=0, 7, 15, 17, and 56; i=35, j=1, 6, 12, 22, and 57; i=36, j=0, 14, 15, 18, and 58; i=37, j=1, 13, 23, and 59; i=38, j=0, 9, 10, 12, and 60; i=39, j=1, 3, 7, 19, and 61; i=40, j=0, 8, 17, and 62; i=41, j=1, 3, 9, 18, and 63; i=42, j=0, 4, 24, and 64; i=43, j=1, 16, 18, 25, and 65; i=44, j=0, 7, 9, 22, and 66; and i=45, j=1, 6, 10, and 67.
57. The method of claim 56 , wherein decoding the codeword includes decoding the codeword sequentially row by row in the base matrix or simultaneously decoding pairs of rows in the base matrix based on a decoding schedule.
58. The method of claim 57 , further comprising selecting each pair of the pairs of rows from any three sequential rows of the last twenty-one rows indexed by the row indices i=25-45 to decode.
59. A method for wireless communication, the method comprising:
encoding a set of information bits based on a low density parity check (LDPC) code to produce a codeword, wherein:
the LDPC code is based on a base matrix and a lifting factor Z;
the base matrix comprises sixty-eight columns indexed by column indices j=0-67 and forty-six rows indexed by row indices i=0-45;
elements in the base matrix are represented by the row indices i and the column indices j; and
the elements in the base matrix are zero elements except for the elements: i=25, j=1, 6, 7, 14, and 47; i=26, j=0, 2, 4, 15, and 48; i=27, j=1, 6, 8, and 49; i=28, j=0, 4, 19, 21, and 50; i=29, j=1, 14,18, 25, and 51; i=30, j=0, 10, 13, 24, and 52; i=31, j=1, 7, 22, 25, and 53; i=32, j=0, 12, 14, 24, and 54; i=33, j=1, 2, 11, 21, and 55; i=34, j=0, 7, 15, 17, and 56; i=35, j=1, 6, 12, 22, and 57; i=36, j=0, 14, 15, 18, and 58; i=37, j=1, 13, 23, and 59; i=38, j=0, 9, 10, 12, and 60; i=39, j=1, 3, 7, 19, and 61; i=40, j=0, 8, 17, and 62; i=41, j=1, 3, 9, 18, and 63; i=42, j=0, 4, 24, and 64; i=43, j=1, 16, 18, 25, and 65; i=44, j=0, 7, 9, 22, and 66; and i=45; j=1; 6; 10; and 67; and
transmitting the codeword.
60. The method of claim 59 , further comprising puncturing the codeword, wherein transmitting the codeword comprises transmitting the punctured codeword.
61. An apparatus for wireless communication, the apparatus comprising:
a receiver;
one or more antenna elements situated proximal the receiver;
wherein the receiver is configured to receive a codeword in accordance with a radio technology across a wireless channel via the one or more antenna elements;
one or more memories storing at least a portion of a base matrix and computer-executable instructions; and
at least one processor coupled with the one or more memories and configured to execute the computer-executable instructions to cause the apparatus to decode the codeword, according to a decoding schedule and based on a low density parity check (LDPC) code, to produce a set of information bits, wherein:
the LDPC code is based on the base matrix and a lifting factor Z;
the base matrix comprises sixty-eight columns indexed by column indices i=0-67 and forty-six rows indexed by row indices i=0-45;
elements in the base matrix are represented by the row indices i and the column indices j;
the elements in the base matrix are zero elements except for the elements: i=25; j=1; 6; 7; 14; and 47; i=26; j=0; 2; 4; 15; and 48; i=27; j=1; 6; 8; and 49; i=28; j=0; 4; 19; 21; and 50; i=29; j=1; 14; 18; 25; and 51; i=30; j=0; 10; 13; 24; and 52; i=31; j=1; 7; 22; 25; and 53; i=32; j=0; 12; 14; 24; and 54; i=33; j=1; 2; 11; 21; and 55; i=34; j=0; 7, 15; 17; and 56; i=35; j=1; 6; 12; 22; and 57; i=36; j=0; 14; 15; 18; and 58; i=37; j=1; 13; 23; and 59; i=38; j=0; 9, 10, 12; and 60; i=39; j=1; 3; 7, 19; and 61; i=40; j=0; 8, 17; and 62; i=41; j=1; 3; 9; 18; and 63; i=42; j=0; 4; 24; and 64; i=43; j=1; 16; 18; 25; and 65; i=44; j=0; 7; 9; 22; and 66; and i=45; j=1; 6; 10; and 67; and
to decode the codeword based on the LPDC code, the at least one processor is configured to cause the apparatus to skip decoding of the zero elements in the base matrix.
62. An apparatus for wireless communication, the apparatus comprising:
a transmitter;
one or more antenna elements situated proximal the transmitter;
one or more memories storing at least a portion of a base matrix and computer-executable instructions; and
at least one processor coupled with the one or more memories and configured to execute the computer-executable instructions to cause the apparatus to encode a set of information bits based on a low density parity check (LDPC) code to produce a codeword, wherein:
the LDPC code is based on the base matrix and a lifting factor Z;
the base matrix comprises sixty-eight columns indexed by column indices j=0-67 and forty-six rows indexed by row indices i=0-45;
elements in the base matrix are represented by the row indices i and the column indices j; and
the elements in the base matrix are zero elements except for the elements: i=25; j=1; 6; 7; 14; and 47; i=26; j=0; 2; 4; 15; and 48; i=27; j=1; 6; 8; and 49; i=28; j=0; 4; 19; 21; and 50; i=29; j=1; 14; 18; 25; and 51; i=30; j=0; 10; 13; 24; and 52; i=31; j=1; 7; 22; 25; and 53; i=32; j=0; 12; 14; 24; and 54; i=33; j=1; 2; 11; 21; and 55; i=34; j=0; 7; 15; 17; and 56; i=35; j=1; 6; 12, 22; and 57; i=36; j=0; 14; 15; 18; and 58; i=37; j=1; 13; 23; and 59; i=38; j=0; 9; 10; 12; and 60; i=39; j=1; 3; 7; 19; and 61; i=40; j=0; 8; 17; and 62; i=41; j=1; 3; 9; 18; and 63; i=42; j=0; 4; 24; and 64; i=43; j=1; 16; 18; 25; and 65; i=44; j=0; 7; 9; 22; and 66; and i=45; j=1; 6; 10; and 67; and
wherein the transmitter is configured to transmit the codeword in accordance with a radio technology across a wireless channel via the one or more antenna elements.