IP Library Granted Patent US 50,892
Granted Patent E1
US 50,892 · App. 18/219,284 · Granted May 12, 2026

Display apparatus

Inventors: JinChae Jeon (Paju-si, KR); SoYoung Noh (Goyang-si, KR); UiJin Chung (Goyang-si, KR); Eunsung Kim (Goyang-si, KR); HyunSoo Shin (Paju-si, KR); Wonkyung Kim (Busan, KR); Jeihyun Lee (Goyang-si, KR)
Assignee: LG Display Co., Ltd.
H10D86/481H10D86/411H10D86/421H10D86/423H10D86/451H10D86/60
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Quick Facts
Patent No.
US 50,892
App. No.
18/219,284
Granted
May 12, 2026
Kind
E1
Abstract

A display apparatus includes a substrate having a first substrate, a second substrate, and an inorganic insulating layer between the first substrate and the second substrate. A first buffer layer is on the substrate, wherein the first buffer layer includes n+1 layers, and ‘n’ is 0 or an even number. A first thin film transistor, a second thin film transistor, and a storage capacitor are each on the first buffer layer. The first thin film transistor includes a first active layer formed of a low temperature poly silicon material. The second thin film transistor includes a second active layer formed of an oxide semiconductor material. The storage capacitor includes a first capacitor electrode and a second capacitor electrode.

Claims (131)

1 . A display apparatus, comprising:

a display substrate including:

a first substrate;

a second substrate; and

an inorganic insulating layer between the first substrate and the second substrate;

a first buffer layer on the display substrate, the first buffer layer including n+1 layers, ‘n’ being 0 or an even number; and

a first thin film transistor, a second thin film transistor, and a storage capacitor, each on the first buffer layer,

wherein the first substrate and the second substrate are formed of a plastic,

wherein the first thin film transistor includes:

a first active layer formed of a low temperature poly silicon material,

a first gate electrode overlapping the first active layer, with a first gate insulating layer therebetween, and

a first source electrode and a first drain electrode, which are electrically connected to the first active layer,

wherein the second thin film transistor includes:

a second active layer formed of an oxide semiconductor,

a second gate electrode overlapping the second active layer, with a second gate insulating layer therebetween, and

a second source electrode and a second drain electrode, which are electrically connected to the second active layer,

wherein the storage capacitor includes a first capacitor electrode on a same layer as the first gate electrode and a second capacitor electrode overlapping the first capacitor electrode, with a first interlayer insulating layer therebetween,

wherein at least one of the first capacitor electrode and the second capacitor electrode is disposed laterally between the first gate electrode and the second gate electrode in a cross-sectional view, and

wherein the first capacitor electrode and the second capacitor electrode are disposed below a layer on which the second active layer is disposed.

2 . The display apparatus of claim 1 , further comprising a hydrogen blocking layer that is an extension of one or both of the first and second capacitor electrodes, and overlaps the second active layer.

3 . The display apparatus according to claim 1 , wherein the inorganic insulating layer is formed of a silicon oxide (SiOx) or silicon nitride (SiNx) material.

4 . The display apparatus according to claim 1 , wherein:

‘n’ is 0; and

the first buffer layer is a single layer formed of a silicon oxide (SiOx) or a silicon nitride (SiNx) material.

5 . The display apparatus according to claim 1 , wherein:

‘n’ is equal to or larger than 2; and

the first buffer layer is a multi-layer in which a silicon oxide (SiOx) layer and a silicon nitride (SiNx) layer are alternately formed.

6 . The display apparatus according to claim 5 , wherein the n+1 layers of the first buffer layer include:

a lower layer that contacts the display substrate, and is formed of the silicon oxide (SiOx) material;

an upper layer that contacts the first active layer, and is formed of the silicon oxide (SiOx) material; and

an intermediate layer between the upper layer and the lower layer.

7 . The display apparatus according to claim 6 , wherein a thickness of the upper layer is larger than a thickness of the intermediate layer and a thickness of the lower layer.

8 . The display apparatus according to claim 7 , wherein the thickness of the intermediate layer is equal to the thickness of the lower layer.

9 . A display apparatus, comprising:

a substrate including a layer formed of a plastic;

a first buffer layer on the substrate;

a first thin film transistor on the substrate and including:

a first active layer formed of a low temperature poly silicon material;

a first gate electrode overlapping the first active layer, with a first gate insulating layer therebetween; and

a first source electrode and a first drain electrode, which are electrically connected to the first active layer;

a second thin film transistor on the substrate and including:

a second active layer formed of an oxide semiconductor;

a second gate electrode overlapping the second active layer, with a second gate insulating layer therebetween; and

a second source electrode and a second drain electrode, which are electrically connected to the second active layer;

a storage capacitor including a first capacitor electrode on a same layer as the first gate electrode and a second capacitor electrode overlapping the first capacitor electrode, with a first interlayer insulating layer therebetween; and

a first hydrogen blocking layer that is an extension of the second capacitor electrode, which overlaps the second active layer

a second interlayer insulating layer over the first active layer and the second active layer and over the first interlayer insulating layer,

wherein each of the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode directly contacts an upper surface of the second interlayer insulating layer,

wherein the first buffer layer include:

a lower layer that contacts the substrate and is formed of a silicon oxide (SiOx) material;

an upper layer that contacts the first active layer and is formed of the silicon oxide (SiOx) material; and

an intermediate layer between the upper layer and the lower layer, and

wherein a thickness of the upper layer is larger than a thickness of the intermediate layer and a thickness of the lower layer.

10 . The display apparatus according to claim 9 26 , further comprising wherein:

the substrate including includes:

a first substrate;

a second substrate; and

an inorganic insulating layer between the first substrate and the second substrate, and

wherein at least one of the first substrate and the second substrate are formed includes a plastic material.

11 . The display apparatus according to claim 10 26 , further comprising:

a second buffer layer between the first hydrogen blocking layer and the second active layer, and having a plurality of layers including a silicon oxide (SiOx) layer and a silicon nitride (SiNx) layer,

wherein the second buffer layer includes the silicon oxide (SiOx) layer as an uppermost layer, which contacts the second active layer, and at least one silicon nitride (SiNx) layer between the uppermost layer and the first hydrogen blocking layer.

12 . The display apparatus according to claim 10 26 , further comprising a second hydrogen blocking layer that is an extension of the other of the first capacitor electrode and the second capacitor electrode,

which wherein the second hydrogen blocking layer overlaps the second active layer and the first hydrogen blocking layer.

13 . The display apparatus according to claim 11 , wherein:

the second buffer layer includes:

a second upper buffer layer; and

a second lower buffer layer;

the second upper buffer layer is the silicon oxide (SiOx) layer; and

the second lower buffer layer is the silicon nitride (SiNx) layer.

14 . The display apparatus according to claim 13 , wherein the second upper buffer layer is a silicon dioxide (SiO 2 ) layer.

15 . The display apparatus according to claim 11 , wherein:

the first active layer of the first thin film transistor is on the first buffer layer;

the first gate insulating layer is on the first active layer and the first buffer layer;

the first gate electrode of the first thin film transistor and the first capacitor electrode of the storage capacitor are on the first gate insulating layer;

the first interlayer insulating layer is on the first gate electrode and the first capacitor electrode;

the second capacitor electrode of the storage capacitor overlapping the first capacitor electrode and the first hydrogen blocking layer overlapping the second active layer are on the first interlayer insulating layer;

the second buffer layer is on the second capacitor electrode, the first hydrogen blocking layer, and the first interlayer insulating layer;

the second active layer of the second thin film transistor is on the second buffer layer;

the second gate insulating layer is on the second active layer;

the second gate electrode of the second thin film transistor is on the second gate insulating layer; and

the second interlayer insulating layer is on the second gate electrode, the second active layer, and the second buffer layer; and

the first source electrode and the first drain electrode of the first thin film transistor and the second source electrode and the second drain electrode of the second thin film transistor are on the second interlayer insulating layer.

16 . The display apparatus according to claim 15 9 , wherein the second source electrode and the second drain electrode are electrically connected to the second active layer through a contact hole of respective contact holes in the second interlayer insulating layer.

17 . The display apparatus according to claim 15 , wherein the first source electrode and the first drain electrode are electrically connected to the first active layer through contact holes of the second interlayer insulating layer, the second buffer layer, the first interlayer insulating layer, and the first gate insulating layer.

18 . The display apparatus according to claim 15 , further comprising:

a connection electrode on the second interlayer insulating layer, and electrically connecting the second capacitor electrode of the storage capacitor and the second drain electrode of the second thin film transistor to each other,

wherein the connection electrode is connected to the second drain electrode to be integrally formed.

19 . The display apparatus according to claim 18 , wherein the connection electrode is electrically connected to the second capacitor electrode through the contact holes of the second interlayer insulating layer and the second buffer layer.

20 . The display apparatus according to claim 15 , further comprising:

a connection electrode on the second interlayer insulating layer, and electrically connecting the second capacitor electrode of the storage capacitor and the second drain electrode of the second thin film transistor to each other,

wherein the connection electrode includes:

a second connection electrode integrally connected to the second drain electrode, and

a first connection electrode, which connects the second connection electrode and the second capacitor electrode.

21 . The display apparatus according to claim 20 , wherein the first connection electrode and the second connection electrode are electrically connected to the second capacitor electrode through the contact holes of the second interlayer insulating layer and the second buffer layer.

22 . A display apparatus, comprising:

a substrate including a layer formed of a plastic material;

a first buffer layer on the substrate;

a first thin film transistor on the substrate and including:

a first active layer formed of a low temperature poly silicon material; and

a first gate electrode overlapping the first active layer, with a first gate insulating layer therebetween; and

a first source electrode and a first drain electrode, which are electrically connected to the first active layer;

a second thin film transistor on the substrate and including:

a second active layer formed of an oxide semiconductor; and

a second gate electrode overlapping the second active layer, with a second gate insulating layer therebetween; and

a second source electrode and a second drain electrode, which are electrically connected to the second active layer;

a storage capacitor including a first capacitor electrode on a same layer as the first gate electrode and a second capacitor electrode overlapping the first capacitor electrode, with a first interlayer insulating layer therebetween; and

a first hydrogen blocking layer that is an extension on a same layer as one of the first capacitor electrode, which overlaps the second active layer and the second capacitor electrode,

wherein the second gate electrode overlaps the first hydrogen blocking layer, and

wherein the first hydrogen blocking layer is disposed below a layer on which the second active layer is disposed.

23 . The display apparatus of claim 22 , further comprising a second hydrogen blocking layer that is an extension on a same layer as the other of the first capacitor electrode and the second capacitor electrode, which overlaps the second active layer and the first hydrogen blocking layer

wherein the first hydrogen blocking layer is formed of a same material as the one of the first capacitor electrode and the second capacitor electrode, and the second hydrogen blocking layer is formed of a same material as the other of the first capacitor electrode and the second capacitor electrode.

24. The display apparatus of claim 23 , wherein:

the first hydrogen blocking layer is an extension of the one of the first capacitor electrode and the second capacitor electrode, and

the second hydrogen blocking layer is an extension of the other of the first capacitor electrode and the second capacitor electrode.

25. The display apparatus of claim 22 , wherein:

the first hydrogen blocking layer is formed of a same material as the one of the first capacitor electrode and the second capacitor electrode, and

the second active layer overlaps the first hydrogen blocking layer.

26. The display apparatus of claim 9 , further comprising:

a first hydrogen blocking layer on a same layer as one of the first capacitor electrode and the second capacitor electrode,

wherein the second gate electrode overlaps the first hydrogen blocking layer.

27. The display apparatus of claim 26 , wherein:

the first hydrogen blocking layer is formed of a same material as the one of the first capacitor electrode and the second capacitor electrode, and

the second active layer overlaps the first hydrogen blocking layer.

28. The display apparatus of claim 26 , wherein the first hydrogen blocking layer is an extension of the one of the first capacitor electrode and the second capacitor electrode.

29. The display apparatus of claim 1 , wherein the second active layer does not overlap at least one of the first capacitor electrode and the second capacitor electrode.

30. The display apparatus of claim 29 , wherein the second active layer overlaps neither the first capacitor electrode nor the second capacitor electrode.

31. The display apparatus of claim 1 , further comprising a first hydrogen blocking layer contacting an upper surface of a same layer as one of the first capacitor electrode and the second capacitor electrode contacts,

wherein the second gate electrode overlaps the first hydrogen blocking layer.

32. The display apparatus of claim 31 , further comprising a second hydrogen blocking layer contacting an upper surface of a same layer as the other of the first capacitor electrode and the second capacitor electrode contacts.

33. The display apparatus of claim 22 , wherein at least one of the first capacitor electrode and the second capacitor electrode is disposed laterally between the first gate electrode and the second gate electrode in a cross-sectional view.

Priority Claims (1)
KR 10-2018-0136203 · Nov 7, 2018 · national
Continuity (1)
Reissue 16575917 · Sep 19, 2019
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