Dual damascene process using a single photo mask
A dual damascene process using a single photo mask in which a photo mask having patterns with different transparency is applied. A mask layer with a dual layer opening is formed first and then serves as an etching mask to form a dual opening in the dielectric layer. Then a metal layer is filled in the dual layer opening in the dielectric layer to form a dual damascene structure. Therefore, only a single photolithography process is necessary and overlay due to misalignment can be avoided.
1. A dual damascene process using a single photo mask, comprising the steps of:
(a) providing a substrate;
(b) forming a dielectric layer on the substrate;
(c) forming a mask layer on the dielectric layer;
(d) forming a photoresist layer on the mask layer;
(e) executing photolithography with a photo mask to define a photoresist pattern having a first dual layer opening comprising a first opening and a second opening which expose the surface of the mask layer;
(f) removing the mask layer not covered by the photoresist pattern to form a mask pattern having a second dual layer opening comprising a third opening and a fourth opening which expose the surface of the dielectric layer;
(g) removing the surface of the dielectric layer exposed in the fourth opening not covered by the mask pattern to form a contact window in the dielectric layer which exposing the surface of the substrate;
(h) removing part of the mask pattern to form a residue mask pattern exposing part of the dielectric layer;
(i) removing part of the dielectric layer not covered by the residue mask pattern to form a trench which constitutes a dual opening together with the contact window;
(j) removing the mask layer; and
(k) forming a conductive layer in the opening.
2. The dual damascene process using a single photo mask according to claim 1 , wherein the photo mask is manufactured by a method comprising:
providing a transparent substrate;
forming an opaque first pattern on part of the transparent substrate;
forming a semiopaque second pattern connecting to the first pattern on part of the transparent substrate; and
forming a transparent area within the second pattern.
3. The dual damascene process using a single photo mask according to claim 2 , wherein the first pattern is made of chromium.
4. The dual damascene process using a single photo mask according to claim 1 , wherein the substrate comprises semiconductor.
5. The dual damascene process using a single photo mask according to claim 1 , wherein the substrate comprises metal.
6. The dual damascene process using a single photo mask according to claim 1 , wherein the dielectric layer is silicon dioxide.
7. The dual damascene process using a single photo mask according to claim 1 , wherein the mask layer is silicon nitride.
8. The dual damascene process using a single photo mask according to claim 1 , wherein step (f) is carried out by non-isotropic etching.
9. The dual damascene process using a single photo mask according to claim 1 , wherein step (g) is carried out by non-isotropic etching.
10. The dual damascene process using a single photo mask according to claim 1 , wherein step (h) is carried out by non-isotropic etching.
11. The dual damascene process using a single photo mask according to claim 1 , wherein step (i) is carried out by non-isotropic etching.
12. A dual damascene process using a single photo mask, comprising the steps of:
(a) providing a substrate;
(b) forming a dielectric layer on the substrate;
(c) forming a single mask layer on the dielectric layer;
(d) forming a photoresist layer on the single mask layer;
(e) performing photolithography process with a single photo mask to define a photoresist pattern having a first dual layer opening comprising a first opening and a second opening which expose the surface of the single mask layer;
(f) removing the single mask layer not covered by the photoresist pattern to form a mask pattern having a second dual layer opening comprising a third opening and a fourth opening which expose the surface of the dielectric layer;
(g) removing the surface of the dielectric layer exposed in the fourth opening not covered by the mask pattern to form a contact window in the dielectric layer exposing the surface of the substrate;
(h) removing part of the mask pattern to form a residue mask pattern exposing part of the dielectric layer;
(i) removing part of the dielectric layer not covered by the residue mask pattern to form a trench which constitute a dual opening together with the contact window;
(j) removing the mask layer; and
(k) forming a conductive layer in the opening, wherein the method of manufacturing the photo mask in step (e) comprises the steps:
(e1) providing a transparent substrate;
(e2) forming an opaque first pattern on part of the transparent substrate;
(e3) forming a semiopaque second pattern connecting to the first pattern on part of the transparent substrate; and
(e4) forming a transparent area within the second pattern.
13. The dual damascene process using a single photo mask according to claim 12 , wherein the first pattern is made of chromium.
14. The dual damascene process using a single photo mask according to claim 12 , wherein the second pattern is made of SiON.
15. The dual damascene process using a single photo mask according to claim 12 , wherein the substrate comprises semiconductor.
16. The dual damascene process using a single photo mask according to claim 12 , wherein the substrate comprises metal.
17. The dual damascene process using a single photo mask according to claim 12 , wherein the dielectric layer is silicon dioxide.
18. The dual damascene process using a single photo mask according to claim 12 , wherein step (f) is carried out by non-isotropic etching.
19. The dual damascene process using a single photo mask according to claim 12 , wherein step (g) is carried out by non-isotropic etching.
20. The dual damascene process using a single photo mask according to claim 12 , wherein step (h) is carried out by non-isotropic etching.