IP Library › Granted Patent US 6,867,120
Granted Patent B2
US 6,867,120 · App. 10/353,028 · Granted Mar 15, 2005

Method of fabricating a semiconductor device with a gold conductive layer and organic insulating layer

Assignee: Oki Electric Industry Co., Ltd.
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Quick Facts
Patent No.
US 6,867,120
App. No.
10/353,028
Granted
Mar 15, 2005
Kind
B2
Abstract

In a semiconductor device, particles are removed from the surface of a gold conductive layer before an intermediate insulating layer of an amino silane compound is formed. An organic insulating layer is formed on the intermediate insulating layer. As a result, adhesion strength between the conductive layer and the intermediate insulating layer can be improved.

Claims (32)

1. A method for fabricating a semiconductor device, comprising:

removing particles from a surface of a conductive layer which is comprised of gold;

forming an intermediate insulating layer on the conductive layer, wherein the intermediate insulating layer is composed of an amino silane compound; and

forming an organic insulating layer on the intermediate insulating layer.

2. The method according to claim 1 , wherein the organic insulating layer and the conductive layer are joined with the intermediate insulating layer.

3. The method according to claim 1 , wherein a concave portion is formed in the surface of the conductive layer.

4. The method according to claim 1 , wherein the amino silane compound is N-aminoalkyl-aminoalkyl (dimethoxyl)-methylsilane.

5. The method according to claim 1 , wherein the particles are comprised of metallic oxide.

6. The method according to claim 1 , the step of removing including

exposing the surface of the conductive layer to hydrochloric acid solution.

7. The method according to claim 6 , wherein the hydrochloric acid solution is diluted with water so as to cause a concentration of the hydrochloric acid solution to be equal to or more than one three hundredth.

8. The method according to claim 1 , the step of removing including

exposing the surface of the conductive layer to an aqua regia solution.

9. The method according to claim 8 , wherein the aqua regia solution is diluted with water so as to cause a concentration of the aqua regia solution to be equal to or more than one tenth.

10. A method for fabricating a semiconductor device, comprising:

forming a first conductive layer on a semiconductor substrate;

forming an insulating layer on the first conductive layer and the semiconductor substrate;

forming a contact hole in the insulating layer so as to expose either a portion of the first conductive layer or a portion of the semiconductor substrate;

forming a metallic layer on an upper surface of the insulating layer and an interior surface of the contact hole;

forming a second conductive layer on the metallic layer, wherein the second conductive layer is comprised of gold;

etching the metallic layer using the second conductive layer as a mask;

removing particles from a surface of the second conductive layer;

forming an intermediate insulating layer on the second conductive layer, wherein the intermediate insulating layer is composed of an amino silane compound; and

forming an organic insulating layer on the intermediate insulating layer;

wherein the organic insulating layer and the second conductive layer are joined with the intermediate insulating layer.

11. The method according to claim 10 , the step of etching including

obliquely implanting ions to the semiconductor substrate.

12. The method according to claim 10 , wherein the particles include iron oxide.

13. The method according to claim 10 , the step of removing including

exposing the second conductive layer to hydrochloric acid solution.

14. The method according to claim 13 , wherein the hydrochloric acid solution is diluted with water so as to cause a concentration of the hydrochloric acid solution to be equal to or more than one three hundredth.

15. The method according to claim 10 , wherein the amino silane compound is N-aminoalkyl-aminoalkyl (dimethoxyl)-methylsilane.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2023
From: NEOPHOTONICS SEMICONDUCTOR GK
To: NEOPHOTONICS CORPORATION
Reel/Frame 063148/0468 →
CHANGE OF NAME Recorded Oct 22, 2013
From: OKI SEMICONDUCTOR CO., LTD.
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 031627/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2013
From: LAPIS SEMICONDUCTOR CO., LTD.
To: NEOPHOTONICS SEMICONDUCTOR GK
Reel/Frame 031040/0194 →
CHANGE OF NAME Recorded Dec 11, 2008
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022052/0540 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2003
From: OKAJIMA, TAKEHIKO; IKEYA, MASAHISA
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 013720/0855 →
Priority Claims (1)
JP 2002218426 · Jul 26, 2002 · national
Continuity (1)
Related Publication 20040018744A1 · Jan 29, 2004