IP Library Granted Patent US 6,897,096
Granted Patent B2
US 6,897,096 · App. 10/417,056 · Granted May 24, 2005

Method of packaging semiconductor dice employing at least one redistribution layer

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 6,897,096
App. No.
10/417,056
Granted
May 24, 2005
Kind
B2
Abstract

A method and apparatus for assembling and packaging semiconductor dice. The semiconductor dice or assemblies of stacked and electrically interconnected semiconductor dice are placed at mutually spaced locations with respect to a common plane and encapsulated in a dielectric material so that end portions of discrete conductive elements extending outwardly from each semiconductor die adjacent the common plane are exposed through an outer surface of the dielectric material. Redistribution lines are formed to extend from the exposed end portions of the discrete conductive elements to predetermined locations over the outer surface of the encapsulant which correspond with another interconnect outline and conductive bumps formed at the predetermined locations. Encapsulated semiconductor dice or die stacks may be severed from the encapsulant to form individual packages, or laterally spaced semiconductor dice electrically interconnected by redistribution lines may be maintained together as a group in a single package or module.

Claims (74)

1. A method of packaging semiconductor dice comprising:

attaching a plurality of semiconductor dice with discrete conductive elements extending from surfaces thereof in mutually laterally spaced relationship to a flexible substrate so that an end portion of each of the discrete conductive elements is substantially in contact with the flexible substrate;

applying dielectric filler material at least around the discrete conductive elements in an area between each of the plurality of semiconductor dice and the flexible substrate;

removing the flexible substrate from an outer surface of the dielectric filler material so that the end portions of the discrete conductive elements are exposed through the outer surface of the dielectric filler material; and

forming at least one redistribution line over the outer surface of the dielectric filler material in contact with at least one of the end portions.

2. The method of claim 1 , further comprising stacking at least one additional semiconductor die on each of the semiconductor dice of the plurality.

3. The method of claim 1 , wherein applying the dielectric filler material further comprises dispensing the dielectric filler material around and between the semiconductor dice of the plurality.

4. The method of claim 3 , wherein applying the dielectric filler material is effected using a transfer molding process.

5. The method of claim 4 , wherein applying the dielectric filler material in the transfer molding process comprises:

placing the flexible substrate with the plurality of semiconductor dice attached thereto in a transfer mold; and

filling the transfer mold with the dielectric filler material to at least partially encapsulate each of the plurality of semiconductor dice.

6. The method of claim 5 , further including singulating the plurality of at least partially encapsulated semiconductor dice.

7. The method of claim 1 , further comprising applying a second flexible substrate over a back surface of each of the plurality of semiconductor dice attached to the flexible substrate so that the flexible substrate and the second flexible substrate define a gap therebetween wherein resides the plurality of semiconductor dice.

8. The method of claim 7 , wherein applying the dielectric filler material comprises dispensing the dielectric filler material in the gap.

9. The method of claim 1 , wherein removing the flexible substrate comprises exposing the end portions of the discrete conductive elements substantially in contact with the flexible substrate.

10. The method of claim 1 , wherein attaching comprises adhesively attaching the discrete conductive elements on the plurality of semiconductor dice to the flexible substrate.

11. The method of claim 1 , wherein forming comprises:

depositing a layer of conductive material over the outer surface of the dielectric filler material; and

patterning the layer of conductive material to form the at least one redistribution line.

12. The method of claim 11 , wherein depositing comprises depositing by at least one of chemical vapor deposition, physical vapor deposition and sputtering.

13. The method of claim 11 , wherein patterning comprises

masking the layer of conductive material with a mask material, defining a pattern in the mask material to expose some portions of the layer of conductive material and etching the exposed portions of the layer of conductive material by at least one of a wet etch and a dry etch.

14. The method of claim 1 , wherein forming comprises:

placing a laminate comprising a conductive foil on a dielectric film over the outer surface of the dielectric filler material; and

patterning the conductive foil and removing a portion thereof in accordance with the pattern to define the at least one redistribution line.

15. The method of claim 1 , wherein forming comprises positioning a film carrying at least one preformed trace over the outer surface of the dielectric filler material to form the at least one redistribution line.

16. The method of claim 1 , wherein forming comprises extending the at least one redistribution line from the exposed end portion of at least one of the discrete conductive elements to a predetermined location on the outer surface of the dielectric filler material corresponding with a location of a terminal of an interconnect outline of another component.

17. The method of claim 1 , wherein forming comprises interconnecting the exposed end portion of at least one discrete conductive element of at least two semiconductor dice of the plurality of semiconductor dice with the at least one redistribution line.

18. The method of claim 1 , further comprising singulating the plurality of semiconductor dice into singulated die packages.

19. The method of claim 2 , further comprising singulating the plurality of semiconductor dice into separate packages each including at least one of the semiconductor dice of the plurality having at least one additional semiconductor die stacked thereon.

20. The method of claim 1 , further comprising associating with each of the plurality of semiconductor dice at least one additional semiconductor die to form a plurality of stacked semiconductor dice and placing at least two of the plurality of stacked semiconductor dice in mutually operable communication through wire bonds extending therebetween.

21. The method of claim 20 , further including orienting the plurality of stacked semiconductor dice with active surfaces thereof facing in the same direction.

22. The method of claim 21 , further including placing each of the semiconductor dice of the plurality of stacked semiconductor dice in mutually operable communication with at least one other semiconductor die through wire bonds.

23. The method of claim 22 , further including encapsulating the plurality of stacked semiconductor dice in a stack with a dielectric filler material.

24. The method of claim 21 , further including placing the discrete conductive elements to extend outwardly from the active surfaces of the semiconductor dice of the plurality.

25. The method of claim 21 , further including placing the discrete conductive elements to extend outwardly from back surfaces of the semiconductor dice of the plurality.

26. The method of claim 1 , further comprising associating with each of the plurality of semiconductor dice at least one additional semiconductor die to form a plurality of stacked semiconductor dice and placing at least two of the plurality of stacked semiconductor dice in mutually operable communication through redistribution lines carried on an active surface or a back surface thereof.

27. The method of claim 26 , further including placing, on at least one of the at least two of the plurality of stacked semiconductor dice, redistribution lines on both an active surface and a back surface thereof interconnected by edge connects extending over a side surface thereof.

28. A method for forming an I/O configuration comprising:

attaching a plurality of semiconductor dice with discrete conductive elements extending from surfaces thereof to a flexible substrate so that an end portion of each of the discrete conductive elements extending from the surfaces of the plurality of semiconductor dice is substantially in contact with the flexible substrate;

applying dielectric filler material at least around the discrete conductive elements between the plurality of semiconductor dice and the flexible substrate;

removing the flexible substrate from an outer surface of the dielectric filler material so that the end portions of the discrete conductive elements are exposed through the outer surface of the dielectric filler material; and

forming at least one redistribution line over the outer surface of the dielectric filler material in contact with at least one of the end portions.

29. The method of claim 28 , further comprising stacking at least one additional semiconductor die on each of the semiconductor dice of the plurality.

30. The method of claim 28 , wherein applying the dielectric filler material further comprises dispensing the dielectric filler material around and between the semiconductor dice of the plurality.

31. The method of claim 30 , wherein applying the dielectric filler material is effected using a transfer molding process.

32. The method of claim 31 , wherein applying the dielectric filler material in the transfer molding process comprises:

placing the flexible substrate with the plurality of semiconductor dice attached thereto in a transfer mold; and

filling the transfer mold with the dielectric filler material to at least partially encapsulate each of the plurality of semiconductor dice.

33. The method of claim 32 , further including singulating the plurality of at least partially encapsulated semiconductor dice.

34. The method of claim 28 , further comprising applying a second flexible substrate over a back surface of each of the plurality of semiconductor dice attached to the flexible substrate so that the flexible substrate and the second flexible substrate define a gap therebetween wherein resides the plurality of semiconductor dice.

35. The method of claim 34 , wherein applying the dielectric filler material comprises dispensing the dielectric filler material in the gap.

36. The method of claim 28 , wherein removing the flexible substrate comprises exposing the end portions of the discrete conductive elements substantially in contact with the flexible substrate.

37. The method of claim 28 , wherein attaching comprises adhesively attaching the discrete conductive elements on the plurality of semiconductor dice to the flexible substrate.

38. The method of claim 28 , wherein forming comprises:

depositing a layer of conductive material over the outer surface of the dielectric filler material; and

patterning the layer of conductive material to form the at least one redistribution line.

39. The method of claim 38 , wherein depositing comprises depositing by at least one of chemical vapor deposition, physical vapor deposition and sputtering.

40. The method of claim 38 , wherein patterning comprises masking the layer of conductive material using a mask material, defining a pattern in the mask material to expose some portions of the layer of conductive material and etching the exposed portions of the layer of conductive material by at least one of a wet etch and a dry etch.

41. The method of claim 28 , wherein forming comprises:

placing a laminate comprising a conductive foil on a dielectric film over the outer surface of the dielectric filler material; and

patterning the conductive foil and removing a portion thereof in accordance with the pattern to define the at least one redistribution line.

42. The method of claim 28 , wherein forming comprises positioning a film carrying at least one preformed trace over the outer surface of the dielectric filler material to form the at least one redistribution line.

43. The method of claim 28 , wherein forming comprises extending the at least one redistribution line from the exposed end portion of at least one of the discrete conductive elements to a predetermined location on the outer surface of the dielectric filler material corresponding with a location of a terminal of an interconnect outline of another component.

44. The method of claim 28 , wherein forming comprises interconnecting the exposed end portion of at least one discrete conductive element of at least two semiconductor dice of the plurality of semiconductor dice with the at least one redistribution line.

45. The method of claim 28 , further comprising singulating the plurality of semiconductor dice into singulated die packages.

46. The method of claim 45 , further comprising singulating the plurality of semiconductor dice into separate packages each including at least one of the semiconductor dice of the plurality having at least one additional semiconductor die stacked thereon.

47. The method of claim 28 , further comprising associating with each of the plurality of semiconductor dice at least one additional semiconductor die to form a plurality of stacked semiconductor dice and placing at least two of the plurality of stacked semiconductor dice in mutually operable communication through wire bonds extending therebetween.

48. The method of claim 47 , further including orienting the plurality of stacked semiconductor dice with active surfaces thereof facing in the same direction.

49. The method of claim 48 , further including placing each of the semiconductor dice of the plurality of stacked semiconductor dice in mutually operable communication with at least one other semiconductor die through wire bonds.

50. The method of claim 49 , further including encapsulating the plurality of stacked semiconductor dice in a stack with a dielectric filler material.

51. The method of claim 48 , further including placing the discrete conductive elements to extend outwardly from the active surfaces of the semiconductor dice of the plurality.

52. The method of claim 48 , further including placing the discrete conductive elements to extend outwardly from back surfaces of the semiconductor dice of the plurality.

53. The method of claim 28 , further comprising associating with each of the plurality of semiconductor dice at least one additional semiconductor die to form a plurality of stacked semiconductor dice and placing at least two of the plurality of stacked semiconductor dice in mutually operable communication through redistribution lines carried on an active surface or a back surface thereof.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 1021960400 · Aug 15, 2002
Related Publication 20040033673A1 · Feb 19, 2004