Fabrication method of semiconductor integrated circuit device
A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the water, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edges of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.
1. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first insulative film of a single layer or a stacked layer over a surface of a semiconductor wafer;
(b) removing the first insulative film on an edge of the semiconductor wafer;
(c) patterning the first insulative film after the step (b), on a product-obtainable area and on a non-product-obtainable area of the semiconductor wafer;
(d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c);
(e) forming a second insulative film over the semiconductor wafer including a portion over the first insulative film after the step (d);
(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof; and
(g) removing the second insulative film on the edge of the semiconductor wafer.
2. A fabrication method of a semiconductor integrated circuit device according to claim 1 , wherein the step (b) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
3. A fabrication method of a semiconductor integrated circuit device according to claim 2 , wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
4. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first insulative film of a single layer or a stacked layer on a surface of a semiconductor wafer;
(b) patterning the first insulative film;
(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);
(d) forming a second insulative film on the semiconductor wafer including a portion on the first insulative film after the step (c);
(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof; and
(f) polishing the second insulative film on an edge of the semiconductor wafer with the first insulative film being a polishing end point after the step (e).
5. A fabrication method of a semiconductor integrated circuit device according to claim 4 , wherein the step (f) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
6. A fabrication method of a semiconductor integrated circuit device according to claim 5 , wherein the polishing means has plural polishing drums, in which each of the plural polishing drums is in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
7. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first insulative film on a surface of a semiconductor wafer;
(b) patterning the first insulative film on a product-obtainable area and on a non-product-obtainable area of the semiconductor wafer;
(c) forming a first conductive film over the semiconductor wafer including a portion on the first insulative film after the step (b);
(d) mechanically and chemically polishing the first conductive film with the surface of the first insulative film on the product-obtainable area of the semiconductor wafer being a polishing end point; and
(e) removing the first conductive film on the edge of the semiconductor wafer after the step (d).
8. A fabrication method of a semiconductor integrated circuit device according to claim 7 , wherein the first insulative film on the edge of the wafer is also removed by a predetermined thickness in the step (e) in a case where the first conductive film is a copper film or a copper alloy film.
9. A fabrication method of a semiconductor integrated circuit device according to claim 7 , wherein the step (e) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
10. A fabrication method of a semiconductor integrated circuit device according to claim 9 , wherein the polishing means has plural polishing drums, in which each of the plural polishing drums is in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
11. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first conductive film on a semiconductor wafer;
(b) patterning the first conductive film on a product-obtainable area and on a non-product-obtainable area of the semiconductor wafer, thereby forming first wirings;
(c) forming a first insulative film over the semiconductor wafer including a portion on the first wirings;
(d) mechanically and chemically polishing a surface of the first insulative film, thereby planarizing the surface thereof; and
(e) removing the first insulative film on the edge of the semiconductor wafer after the step (d).
12. A fabrication method of a semiconductor integrated circuit device according to claim 11 , wherein the step (e) conducts polishing by a polishing means using a slurry or an abrasive wheel.
13. A fabrication method of a semiconductor integrated circuit device according to claim 12 , wherein the polishing means includes plural polishing drums, each of the plural polishing drums being in contact with the edge of the semiconductor wafer at a region different from each other and the angle of contact thereof changes depending on the shape of the edge of the semiconductor wafer.
14. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a single layer or stacked layer of a first insulative film on a surface of a semiconductor wafer;
(b) removing the first insulative film on an edge of the semiconductor wafer;
(c) patterning the first insulative film on a product- obtainable area and on a non-product-obtainable area of the semiconductor wafer after the step (b);
(d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c);
(e) forming a second illustrative film over the semicon- ductor wafer including a portion on the first insulative film after the step (d);
(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;
(g) forming a third insulative film over the semiconductor wafer after the step (f);
(h) mechanically and chemically polsihing the surface of the third insulative film, thereby planarizing the surface thereof; and
(i) removing the third insulative film on the edge of the semiconductor wafer after the step (h).
15. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a single layer or a stacked layer of a first insulative film on a surface of a semiconductor wafer;
(b) patterning the first insulative film on a product-obtainable area and on a non-product-obtainable area of the semiconductor wafer;
(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);
(d) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (c);
(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;
(f) polishing the second insulative film on the edge of the semiconductor wafer with the first insulative film being a polishing end point after the step (e);
(g) forming a third insulative film over the semiconductor wafer after the step (f);
(h) mechanically and chemically polishing a surface of the third insulative film, thereby planarizing the surface thereof; and
(i) removing the third insulative film on an edge of the semiconductor wafer after the step (h).