Program counter trace stack, access port, and serial scan path
A data processing device including a semiconductor chip, an electronic processor on-chip and an on-chip condition sensor connected to the electronic processor for analysis of the operations.
1. A data processing device formed on a substrate of semiconductor material comprising:
A. program counter means for controlling program instruction addresses in the data processing device;
B. program counter stack means connected to the program counter means for holding the contents of the program counter;
C. program counter trace stack means connected to the program counter for holding program instruction addresses from the program counter means; and
D. serial scan path means, including an access port, a scan data input lead connected to the access port, a scan data output lead, serial scan registers connected between the scan data input and output leads and coupled to the access port, a scan clock input lead connected to the access port, and a scan mode select input lead connected to the access port, the serial scan registers being selectively connected to the program counter trace stack means, the serial scan path means for transmitting to external the data processing device, on the scan data output lead, program instruction addresses from the program counter trace stack means.
2. The data processing device of claim 1 further including storage means for storing a state vector representing whether a particular address in said program counter trace stack means is a beginning or ending address of a discontinuity.
3. The data processing device of claim 1 wherein said program counter trace stack means includes means for recording how many entries have been pushed onto the stack.
4. The data processing device of claim 1 further control means connected to said program counter trace stack means for producing a signal indicating when the stack is full.
5. The data processing device of claim 1 further including a program memory connected to said program counter means, an instruction decoder connected to said program memory, and an electronic adding and multiplying circuit connected to said instruction decoder.
6. The data processing device of claim 1 including trace stack control means for generating a state vector representing whether a particular address in said trace stack means is a beginning, or ending address of a discontinuity.
7. The data processing device of claim 6 , including a shift register operatively associated with said trace stack means for storing said state vector, said shift register being loaded in said serial scan path for permitting external access to said state vector.
8. The data processing device of claim 7 , wherein said shift register is arranged to permit serial shifting of said state vector out of said shift register along a signal path which is separate and distinct from said serial scan path.
9. The data processing device of claim 8 , including means connected to said signal path for examining said state vector to determine when said trace stack means is full.