IP Library › Granted Patent US 7,026,548
Granted Patent B2
US 7,026,548 · App. 11/180,493 · Granted Apr 11, 2006

Moisture-resistant electronic device package and methods of assembly

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,026,548
App. No.
11/180,493
Granted
Apr 11, 2006
Kind
B2
Abstract

Various embodiments for moisture-resistant image sensor packaging structures and methods of assembly are disclosed. Image sensor packages of the present invention include an interposer, a housing structure formed on the interposer for surrounding an image sensor chip, and a transparent cover. The housing structure may cover substantially all of the interposer chip surface. In another embodiment, the housing structure also covers substantially all of the interposer edge surfaces. The housing structure may also cover substantially all of the interposer attachment surface. An image sensor chip is electrically connected to the interposer with sealed wire bond connections or with sealed flip-chip connections. The housing structure may include runners that enable simultaneous sealing of the interior of the image sensor package and of the transparent cover.

Claims (33)

1. An electronic device package comprising:

a substrate;

a housing structure disposed on the substrate and comprising a plurality of raised sidewalls extending along the perimeter of the substrate defining a cavity in the housing structure;

a ledge on the plurality of raised sidewalls of the housing structure and surrounding the cavity; and

at least one channel disposed within at least one sidewall of the plurality of raised sidewalls and extending from the ledge to a bottom surface of the cavity.

2. The electronic device package of claim 1 , wherein the substrate has a first surface, an opposing second surface, and a plurality of edge surfaces extending between the first surface and the second surface around a perimeter of the substrate, and the housing structure covers the plurality of edge surfaces of the substrate.

3. The electronic device package of claim 2 , further comprising at least one protrusion extending from at least one edge surface of the plurality of edge surfaces.

4. The electronic device package of claim 3 , wherein the at least one protrusion comprises a tie bar extending perpendicularly from the at least one edge surface.

5. The electronic device package of claim 4 , wherein the tie bar is connected to another substrate of another electronic device package.

6. The electronic device package of claim 1 , further comprising:

at least one contact pad on a first surface of the substrate;

at least one attachment pad on an opposing second surface of the substrate; and

at least one conductive element electrically connecting the at least one contact pad and the at least one attachment pad.

7. The electronic device package of claim 6 , wherein the housing structure covers substantially all of the second surface of the substrate and includes at least one aperture exposing the at least one attachment pad through the housing structure.

8. The electronic device package of claim 1 , wherein the housing structure comprises one of a mold compound, an epoxy, and a photocurable polymer or resin.

9. The electronic device package of claim 6 , wherein the at least one contact pad comprises a plurality of contact pads and the at least one aperture in the bottom surface of the cavity comprises a plurality of apertures, each aperture of the plurality of apertures exposing a single contact pad of the plurality of contact pads.

10. The electronic device package of claim 1 , further comprising an electronic device sensitive to light or other radiation mounted within the cavity of the housing structure and having at least one bond pad thereon.

11. The electronic device package of claim 6 , further comprising a sealing material filling a gap between the electronic device and the bottom surface of the cavity.

12. The electronic device package of claim 1 , further comprising a sealant material substantially filling the at least one channel.

13. The electronic device package of claim 1 , further comprising a sealing well comprising a notch in the housing structure adjacent to a junction of the ledge and the at least one channel, the sealing well in fluid communication with the channel.

14. The electronic device package of claim 13 , further comprising a transparent cover supported by the ledge and covering the cavity.

15. The electronic device package of claim 14 , further comprising a sealant material adhesively bonding the transparent cover to the housing structure and covering the bottom surface of the cavity.

16. A method of forming an electronic device package comprising:

providing a substrate;

forming a housing structure including sidewalls defining a cavity on the substrate;

forming a ledge within the sidewalls, the ledge surrounding the cavity;

forming at least one channel extending from the ledge to a bottom of the cavity;

mounting an electronic device sensitive to light or other radiation within the cavity;

covering the cavity with a transparent cover supported by the ledge; and

injecting a sealant material into the at least one channel to simultaneously adhesively bond the transparent cover to the housing structure and cover at least a portion of the bottom surface of the cavity.

17. The method of claim 16 , further comprising forming the housing structure from a mold compound.

18. The method of claim 16 , wherein injecting a sealant material into the at least one channel comprises injecting the sealant material into a sealant well comprising a notch adjacent to a junction of the ledge and the at least one channel.

19. The method of claim 16 , further comprising applying a vacuum to the cavity.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Continuation 1066395900 · Sep 16, 2003
Related Publication 20050263312A1 · Dec 1, 2005