IP Library › Granted Patent US 7,119,387
Granted Patent B2
US 7,119,387 · App. 10/992,653 · Granted Oct 10, 2006

Solid-state image sensor and method for fabricating the same

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,119,387
App. No.
10/992,653
Granted
Oct 10, 2006
Kind
B2
Abstract

A solid-state image sensor comprises a semiconductor substrate of a first conductivity type having a color pixel region and a black pixel region; a first well of the first conductivity type formed in the color pixel region; a second well of the first conductivity type formed in the black pixel region; a third well of a second conductivity type formed, surrounding the second well and isolating the second well from the rest region of the semiconductor substrate; a color pixel formed in the first well in the color pixel region and including a first photodiode and a first read transistor for reading a signal generated by the first photodiode; and a black pixel formed in the second well in the black pixel region and including a second photodiode and a second read transistor for reading a signal generated by the second photodiode. The first well includes a first buried impurity doped layer of the first conductivity type formed in a bottom thereof in a region where the first read transistor is formed. The second well includes a second buried impurity doped layer of the first conductivity type formed in a bottom thereof in a region where the second photodiode is formed and a region where the second read transistor is formed.

Claims (58)

1. A solid-state image sensor comprising:

a semiconductor substrate of a first conductivity type having a color pixel region and a black pixel region;

a first well of the first conductivity type formed in the color pixel region;

a second well of the first conductivity type formed in the black pixel region;

a third well of a second conductivity type formed, surrounding the second well and isolating the second well from the rest region of the semiconductor substrate;

a color pixel formed in the first well in the color pixel region and including a first photodiode and a first read transistor for reading a signal generated by the first photodiode; and

a black pixel formed in the second well in the black pixel region and including a second photodiode and a second read transistor for reading a signal generated by the second photodiode,

the first well including a first buried impurity doped layer of the first conductivity type formed at a bottom thereof in a region where the first read transistor is formed, and

the second well including a second buried impurity doped layer of the first conductivity type formed at a bottom thereof in a region where the second photodiode is formed and a region where the second read transistor is formed.

2. A solid-state image sensor according to claim 1 , wherein

the first photodiode and the second photodiode are a buried-type photodiode,

the color pixel further includes a first transfer transistor which transfer the signal generated by the first photodiode to the first read transistor,

the black pixel further includes a second transfer transistor which transfers the signal generated by the second photodiode to the second read transistor, and

the second buried impurity doped layer is formed also in a region where the second transfer transistor is formed.

3. A solid-state image sensor according to claim 2 , wherein

the first well includes a first impurity doped layer of the first conductivity type formed in the region where the first read transistor is formed, and a second impurity doped layer of the first conductivity type formed in a region where the first transfer transistor is formed and having an impurity concentration lower than that of the first impurity doped layer, and

the second well includes a third impurity doped layer of the first conductivity type formed in the region where the second read transistor is formed, and a fourth impurity doped layer of the first conductivity type formed in the region where the second transfer transistor is formed and having an impurity concentration lower than that of the third impurity doped layer.

4. A solid-state image sensor according to claim 3 , wherein

the first well includes a fifth impurity doped layer of the first conductivity type formed between the first photodiode and a device isolation film, the fifth impurity doped layer having an impurity concentration higher than that of the first impurity doped layer and that of the second impurity doped layer, and

the second well includes a sixth impurity doped layer of the first conductivity type formed between the second photodiode and a device isolation film, the sixth impurity doped layer having an impurity concentration higher than that of the third impurity doped layer and that of the fourth impurity doped layer.

5. A solid-state image sensor according to claim 4 , wherein

the fifth impurity doped layer and the sixth impurity doped layer are formed deeper than the device isolation film.

6. A solid-state image sensor according to claim 1 , further comprising:

a fourth well of the first conductivity type formed in a peripheral circuit region of the semiconductor substrate and including a third buried impurity doped layer of the first conductivity type at a bottom thereof, and

an impurity concentration of the first conductivity type of the third buried impurity doped layer is different from that of the first buried impurity doped layer and that of the second buried impurity doped layer.

7. A solid-state image sensor according to claim 6 , wherein

the impurity concentration of the first conductivity type of the third buried impurity doped layer is higher than that of the first buried impurity doped layer and that of the second buried impurity doped layer.

8. A solid-state image sensor according to claim 6 , wherein

a depth profile of impurities of the first conductivity type forming the first buried impurity doped layer and a depth profile of impurities of the first conductivity type forming the second buried impurity doped layer are acuter than a depth profile of impurities of the first conductivity type forming the third buried impurity doped layer.

9. A solid-state image sensor according to claim 3 , which further comprises:

a fourth well of the first conductivity type formed in a peripheral circuit region of the semiconductor substrate and including a seventh impurity doped layer of the first conductivity type formed at a surface region thereof and a third buried impurity doped layer of the first conductivity type formed at a bottom thereof, and in which

an impurity concentration of the first conductivity type of the seventh impurity doped layer is different from that of the first impurity doped layer and that of the third impurity doped layer.

10. A solid-state image sensor according to claim 9 , wherein

an impurity concentration of the first conductivity type of the seventh impurity doped layer is lower than that of the first impurity doped layer and that of the third impurity doped layer.

11. A solid-state image sensor according to claim 9 , wherein

the first well includes an eighth impurity doped layer formed between the first impurity doped layer and the first buried impurity doped layer,

the second well includes a ninth impurity doped layer formed between the third impurity doped layer and the second buried impurity doped layer, and

an impurity concentration of the first conductivity type in the fourth well at a depth where the eighth impurity doped layer and the ninth impurity doped layer are formed is lower than that in the eighth impurity doped layer and that in the ninth impurity doped layer.

12. A solid-state image sensor according to claim 6 , further comprising:

a fifth well of the second conductivity type formed, surrounding the fourth well and isolating the fourth well from the rest region of the semiconductor substrate.

13. A solid-state image sensor according to claim 9 , further comprising:

a fifth well of the second conductivity type formed, surrounding the fourth well and isolating the fourth well from the rest region of the semiconductor substrate.

14. A solid-state image sensor according to claim 1 , wherein

an end of the first buried impurity doped layer is spaced from an end of the first photodiode.

15. A solid-state image sensor according to claim 1 , wherein

the second buried impurity doped layer has a lower impurity concentration of the first conductivity type in the region where the second photodiode is formed than in the region where the second read transistor is formed.

16. A solid-state image sensor according to claim 1 , wherein

the first photodiode and the second photodiode are a buried-type photodiode, and

an impurity concentration of the second conductivity type at the bottom of a buried diffused layer of the second photodiode is higher than an impurity concentration of the second conductivity type at the bottom of a buried diffused layer of the first photodiode.

17. A solid-state image sensor according to claim 1 , wherein

the first read transistor and the second read transistor each include a first transistor amplifying a signal outputted from the photodiode, a second transistor resetting an input terminal of the first transistor and a third transistor reading a signal outputted by the first transistor.

18. A method for fabricating a solid-state image sensor comprising: a first well of a first conductivity type formed in a color pixel region of a semiconductor substrate of the first conductivity type; a second well of the first conductivity type formed in a black pixel region of the semiconductor substrate; a third well of a second conductivity type formed, surrounding the second well and isolating the second well from the rest region of the semiconductor substrate; a color pixel formed in the first well and including a first photodiode and a first read transistor reading a signal generated by the first photodiode; and a black pixel formed in the second well and including a second photodiode and a second read transistor reading a signal generated by the second photodiode, the method comprising the step of:

implanting an impurity of the first conductivity type to form a first buried impurity doped layer in a bottom of the first well in a region for the first read transistor to be formed in and a second buried impurity doped layer in a bottom of the second well in a region for the second photodiode to be formed in and a region for the second read transistor to be formed in.

19. A method for fabricating a solid-state image sensor according to claim 18 , wherein

the first buried impurity doped layer and the second buried impurity doped layer are formed by ion-implanting an impurity of the first conductivity type in a random direction.

20. A method for fabricating a solid-state image sensor according to claim 18 , further comprising the step of:

ion implanting an impurity of the first conductivity type in a peripheral circuit region of the semiconductor substrate in the direction normal to the semiconductor substrate to form a third buried impurity doped layer of the first conductivity type,

a fourth well of the first conductivity type including the third buried impurity doped layer of the first conductivity type being formed in the peripheral circuit region.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2004
From: OHKAWA, NARUMI
To: FUJITSU LIMITED
Reel/Frame 016020/0719 →
Priority Claims (1)
JP 2004-209681 · Jul 16, 2004 · national
Continuity (1)
Related Publication 20060011952A1 · Jan 19, 2006