Method for manufacturing a semiconductor device
View Patent ↗It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when selectively removing an interlayer insulating film with at least two layers constituting a semiconductor device, and forming an opening. One feature of the invention is that at least either one of a first gas (a first etching gas) and a second gas (a second etching gas) used at the time of the two-step etching is added with an inert gas.
1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a second interlayer insulating film;
forming a first interlayer insulating film over the second interlayer insulating film;
forming an opening which reaches the second interlayer insulating film by selectively removing the first interlayer insulating film using a first gas; and
forming a contact hole by selectively removing the second interlayer insulating film in the opening with using a second gas,
wherein at least one of the first gas and the second gas comprises Ar, and
wherein the second interlayer insulating film is a gate insulating film.
2. A method for manufacturing a semiconductor device according to claim 1 , wherein the first interlayer insulating film is a thermostability planarizing film containing silicon oxide.
3. A method for manufacturing a semiconductor device, comprising the steps of:
forming a second interlayer insulating film;
forming a first interlayer insulating film over the second interlayer insulating film;
forming an opening which reaches the second interlayer insulating film by selectively removing the first interlayer insulating film using a first gas; and
forming a contact hole by selectively removing the second interlayer insulating film in the opening with using a second gas,
wherein at least one of the first gas and the second gas comprises Ar, and wherein a flow of Ar is 26% or more and 50% or less of a total flow of the first gas.
4. A method for manufacturing a semiconductor device, comprising the steps of:
forming a second interlayer insulating film;
forming a first interlayer insulating film over the second interlayer insulating film;
forming an opening which reaches the second interlayer insulating film by selectively removing the first interlayer insulating film using a first gas; and
forming a contact hole by selectively removing the second interlayer insulating film in the opening with using a second gas,
wherein at least one of the first gas and the second gas comprises Ar, and wherein a flow of Ar is 60% or more and 85% or less of a total flow of the second gas.
5. A method for manufacturing a semiconductor device, comprising the steps of:
forming a thin film transistor having a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film, and a gate electrode over a substrate having an insulating surface;
forming a thermostability planarizing film containing silicon oxide over the thin film transistor;
forming an opening over the source region and the drain region which reaches the gate insulating film by selectively removing the thermostability planarizing film using a first gas containing an inert gas; and
forming a contact hole which reaches the source region and the drain region by selectively removing the gate insulating film using a second gas.
6. A method for manufacturing a semiconductor device, comprising the steps of:
forming a thin film transistor having a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film, and a gate electrode over a substrate having an insulating surface;
forming a first insulating film over the thin film transistor;
forming a thermostability planarizing film containing silicon oxide over the thin film transistor;
forming a second insulating film over the thermostability planarizing film;
forming an opening over the source region and the drain region by selectively removing the first insulating film, the thermostability planarizing film and the second insulating film using a first gas containing an inert gas; and
forming a contact hole which reaches the source region and the drain region by selectively removing the gate insulating film using a second gas.
7. A method for manufacturing a semiconductor device, comprising the steps of:
forming a thin film transistor having a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film, and a gate electrode over a substrate having an insulating surface;
forming a thermostability planarizing film containing silicon oxide over the thin film transistor;
forming an opening over the source region and the drain region which reaches the pate insulating film by selectively removing the thermostability planarizing film using a first gas; and
forming a contact hole which reaches the source region and the drain region by selectively removing the gate insulating film using a second gas containing an inert gas.
8. A method for manufacturing a semiconductor device, comprising the steps of:
forming a thin film transistor having a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film, and a gate electrode over a first substrate having an insulating surface;
forming a first insulating film over the thin film transistor;
forming a thermostability planarizing film containing silicon oxide over the thin film transistor;
forming a second insulating film over the thermostability planarizing film;
forming an opening over the source region and the drain region by selectively removing the first insulating film, the thermostability planarizing film and the second insulating film using a first gas; and
forming a contact hole which reaches the source region and the drain region by selectively removing the gate insulating film using a second gas containing an inert gas.
9. A method for manufacturing a semiconductor device, comprising the steps of:
forming a thin film transistor having a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film, and a gate electrode over a first substrate having an insulating surface;
forming a thermostability planarizing film containing silicon oxide over the thin film transistor;
forming an opening over the source region and the drain region which reaches the gate insulating film by selectively removing the thermostability planarizing film using a first gas containing an inert gas; and
forming a contact hole which reaches the source region and the drain region by selectively removing the gate insulating film using a second gas containing an inert gas.
10. A method for manufacturing a semiconductor device, comprising the steps of:
forming a thin film transistor having a semiconductor layer having a source region, a drain region and a channel forming region therebetween, a gate insulating film, and a gate electrode over a first substrate having an insulating surface;
forming a first insulating film over the thin film transistor;
forming a thermostability planarizing film containing silicon oxide over the thin film transistor;
forming a second insulating film over the thermostability planarizing film;
forming an opening over the source region and the drain region by selectively removing the first insulating film, the thermostability planarizing film and the second insulating film using a first gas containing an inert gas; and
forming a contact hole which reaches the source region and the drain region by selectively removing the gate insulating film using a second gas containing an inert gas.
11. A method for manufacturing a semiconductor device according to claim 6 , wherein the first insulating film and the second insulating film are nitride films, and the gate insulating film is an oxide film.
12. A method for manufacturing a semiconductor device according to claim 8 , wherein the first insulating film and the second insulating film are nitride films, and the gate insulating film is an oxide film.
13. A method for manufacturing a semiconductor device according to claim 10 , wherein the first insulating film and the second insulating film are nitride films, and the gate insulating film is an oxide film.
14. A method for manufacturing a semiconductor device according to claim 5 , wherein the inert gas is one or more of Ar, Kr and Xe.
15. A method for manufacturing a semiconductor device according to claim 6 , wherein the inert gas is one or more of Ar, Kr and Xe.
16. A method for manufacturing a semiconductor device according to claim 7 , wherein the inert gas is one or more of Ar, Kr and Xe.
17. A method for manufacturing a semiconductor device according to claim 8 , wherein the inert gas is one or more of Ar, Kr and Xe.
18. A method for manufacturing a semiconductor device according to claim 9 , wherein the inert gas is one or more of Ar, Kr and Xe.
19. A method for manufacturing a semiconductor device according to claim 10 , wherein the inert gas is one or more of Ar, Kr and Xe.
20. A method for manufacturing a semiconductor device according to claim 5 , wherein a flow of the inert gas is 26% or more and 50% or less of a total flow of the first gas.
21. A method for manufacturing a semiconductor device according to claim 6 , wherein a flow of the inert gas is 26% or more and 50% or less of a total flow of the first gas.
22. A method for manufacturing a semiconductor device according to claim 9 , wherein a flow of the inert gas is 26% or more and 50% or less of a total flow of the first gas.
23. A method for manufacturing a semiconductor device according to claim 10 , wherein a flow of the inert gas is 26% or more and 50% or less of a total flow of the first gas.
24. A method for manufacturing a semiconductor device according to claim 7 , wherein a flow of the inert gas is 60% or more and 85% or less of a total flow of the second gas.
25. A method for manufacturing a semiconductor device according to claim 8 , wherein a flow of the inert gas is 60% or more and 85% or less of a total flow of the second gas.
26. A method for manufacturing a semiconductor device according to claim 9 , wherein a flow of the inert gas is 60% or more and 85% or less of a total flow of the second gas.
27. A method for manufacturing a semiconductor device according to claim 10 , wherein a flow of the inert gas is 60% or more and 85% or less of a total flow of the second gas.
28. A method for manufacturing a semiconductor device according to claim 5 , wherein the first gas comprises CF 4 , O 2 , He and Ar.
29. A method for manufacturing a semiconductor device according to claim 6 , wherein the first gas comprises CF 4 , O 2 , He and Ar.
30. A method for manufacturing a semiconductor device according to claim 9 , wherein the first gas comprises CF 4 , O 2 , He and Ar.
31. A method for manufacturing a semiconductor device according to claim 10 , wherein the first gas comprises CF 4 , O 2 , He and Ar.
32. A method for manufacturing a semiconductor device according to claim 7 , wherein the second gas contains CHF 3 and Ar.
33. A method for manufacturing a semiconductor device according to claim 8 , wherein the second gas contains CHF 3 and Ar.
34. A method for manufacturing a semiconductor device according to claim 9 , wherein the second gas contains CHF 3 and Ar.
35. A method for manufacturing a semiconductor device according to claim 10 , wherein the second gas contains CHF 3 and Ar.