Method and apparatus for copper film quality enhancement with two-step deposition

1. In a process for forming a copper interconnect in a semiconductor substrate having a via and a trench in a dual damascene structure, the process comprising:

forming a via and a trench on the semiconductor substrate;

using a first electrochemical plating process, depositing a first copper layer in the via;

annealing the first copper layer in the via to remove impurities including carbon;

depositing a second copper layer in the trench, the second copper layer substantially free of HCl/C-based additives; and

annealing the second copper layer to improve grain size and surface roughness.

2. The process of claim 1 , wherein the step of depositing a second copper layer further comprises performing an electrochemical plating substantially free from HCl/C to avoid impurities caused by chlorine or carbon.

3. The process of claim 1 , wherein the step of depositing a second copper layer further comprises sputtering the second copper layer in the trench.

4. In a process for forming one or more copper (Cu) film on a substrate the Cu film substantially free from defects and impurities, the process comprising:

providing a substrate ( 10 ) having formed therein a first conductive layer ( 11 );

depositing an etch stop layer and a dielectric layer over the substrate, the etch-stop layer and the dielectric having a via ( 14 ) and a trench ( 15 ) positioned to expose the first conductive layer ( 11 );

depositing a diffusion barrier layer ( 16 ) and a Cu seed layer ( 17 ) to cover at least a portion of the via ( 14 ) and the trench ( 15 );

depositing a first Cu layer ( 17 ) to at least partially fill the via ( 14 );

annealing the first Cu layer ( 17 ) at about 180–200° C. to remove a first impurity;

depositing a second Cu layer ( 19 ) to at least partially fill the trench ( 15 ); and

annealing the first Cu layer ( 17 ) and the second Cu layer ( 19 ) at about 180–200° C. to remove a second impurity;

wherein the step of depositing a second Cu layer includes electrochemical plating copper substantially free of HCl and C-based additives to avoid carbon and chlorine impurities.

5. The method of claim 4 , wherein the step of depositing a second Cu layer further comprises electrochemical plating copper.

6. The method of claim 4 , wherein the step of depositing a second Cu layer further comprises sputtering.

7. The method of claim 4 , wherein the step of depositing a second Cu layer further comprises sputtering, the sputtering process substantially free of C, Cl and S impurities.

8. The method of claim 4 , wherein the step of annealing the first Cu layer is carried out for about 1–10 minutes.

9. The method of claim 4 , wherein the step of annealing the first and the second Cu layer is carried out for about 1–10 minutes.

10. The method of claim 4 , wherein the first conductive layer ( 11 ) is selected from the group consisting of Al, Cu, W and alloys thereof.

11. A semiconductor device prepared according to the method of claim 4 .

12. A process for forming one or more Cu film substantially free from defects and impurities on a substrate, the process comprising:

providing a substrate ( 10 ) having formed therein a first conductive layer ( 11 );

depositing an etch stop layer and a dielectric layer over the substrate, the etch-stop layer and the dielectric having a via ( 14 ) and a trench ( 15 ) positioned to expose the conductive layer ( 11 );

depositing a diffusion barrier layer ( 16 ) and a Cu seed layer ( 17 ) to cover at least a portion of the via ( 14 ) and the trench ( 15 );

depositing a first Cu layer ( 17 ) to at least partially fill the via ( 14 );

annealing the first Cu layer ( 17 ) at about 180–200° C. to remove a carbon impurity;

depositing a second Cu layer ( 19 ) to at least partially fill the trench ( 15 ), the second Cu layer deposited through electrochemical plating free of HCL and C-based additive; and

annealing the first Cu layer ( 17 ) and the second Cu layer ( 19 ) at about 180–200° C. to removed additional impurities.

13. The process of claim 12 , further comprising depositing a seed layer.

14. The process of claim 13 , wherein the seed layer further comprises copper.

15. The process of claim 12 , wherein the conductive layer further comprises aluminum, copper, tungsten or an alloy of aluminum and copper.

16. A process for forming one or more Cu film substantially free from defects and impurities on a substrate, the process comprising:

providing a substrate ( 10 ) having formed therein a first conductive layer ( 11 );

depositing an etch stop layer and a dielectric layer over the substrate, the etch-stop layer and the dielectric having a via ( 14 ) and a trench ( 15 ) positioned to expose the conductive layer ( 11 );

depositing a diffusion barrier layer ( 16 ) and a Cu seed layer ( 17 ) to cover at least a portion of the via ( 14 ) and the trench ( 15 );

depositing a first Cu layer ( 17 ) to at least partially fill the via ( 14 );

annealing the first Cu layer ( 17 ) at about 180–200° C. to remove a carbon impurity;

depositing a second Cu layer ( 19 ) to at least partially fill the trench ( 15 ), the second Cu layer deposited through sputtering free of C, Cl and S; and

annealing the first Cu layer ( 17 ) and the second Cu layer ( 19 ) at about 180–200° C. to removed additional impurities.

17. The process of claim 16 , further comprising depositing a seed layer.

18. The process of claim 17 , wherein the seed layer further comprises copper.

19. The process of claim 16 , wherein the conductive layer further comprises aluminum, copper, tungsten or an alloy of aluminum and copper.

20. A semiconductor device prepared according to the process of claim 16 .

21. A method for forming a copper interconnect in a damascene structure comprising:

forming an opening on a substrate;

depositing a first copper layer in the opening using a first plating electrolyte, wherein the electrolyte further comprises chloride ion and carbon-containing additive; and

depositing a second copper layer in the opening using a second plating electrolyte, wherein the second electrolyte is substantially free from chloride ion and carbon-containing additives.

22. The method of claim 21 , further comprising annealing the opening after depositing a first copper layer in the opening.

23. The method of claim 21 , further comprising annealing the opening after depositing a second copper layer in the opening.

24. The method of claim 21 , wherein the step of depositing a second copper layer further comprises sputtering the second copper layer in the opening.

25. A semiconductor device prepared according to the process of claim 21 .

26. In a process for forming a copper interconnect in a semiconductor substrate having a via and a trench in a dual damascene structure, the process comprising:

forming a via and a trench on the semiconductor substrate;

using a first electrochemical plating process, depositing a first copper layer in the via,

annealing the via to remove impurities including carbon;

depositing a second copper layer in the trench, the second copper layer substantially free of HCl/C-based additives; and

annealing the via to improve grain size and sufface roughness;

wherein the step of depositing a second copper layer further comprises performing an electrochemical plating substantially free from HCl/C to avoid impurities caused by chlorine or carbon.

27. In a process for forming one or more copper (Cu) film on a substrate the Cu film substantially free from defects and impurities, the process comprising:

providing a substrate ( 10 ) having formed therein a first conductive layer ( 11 );

depositing an etch stop layer and a dielectric layer over the substrate, the etch-stop layer and the dielectric having a via ( 14 ) and a trench ( 15 ) positioned to expose the first conductive layer ( 11 );

depositing a diffusion barrier layer ( 16 ) and a Cu seed layer ( 17 ) to cover at least a portion of the via ( 14 ) and the trench ( 15 );

depositing a first Cu layer ( 17 ) to at least partially fill the via ( 14 );

annealing the first Cu layer ( 17 ) at about 180–200° C. to remove a first impurity;

depositing a second Cu layer ( 19 ) to at least partially fill the trench ( 15 ); and

annealing the first Cu layer ( 17 ) and the second Cu layer ( 19 ) at about 180–200° C. to remove a second impurity;

wherein the step of depositing a second Cu layer further comprises sputtering, the sputtering process substantially free of C, Cl and S impurities.

28. A process for forming one or more Cu film substantially free from defects and impurities on a substrate, the process comprising:

providing a substrate ( 10 ) having formed therein a first conductive layer ( 11 );

depositing an etch stop layer and a dielectric layer over the substrate, the etch-stop layer and the dielectric having a via ( 14 ) and a trench ( 15 ) positioned to expose the conductive layer ( 11 );

depositing a diffusion barrier layer ( 16 ) and a Cu seed layer ( 17 ) to cover at least a portion of the via ( 14 ) and the trench ( 15 );

depositing a first Cu layer ( 17 ) to at least partially fill the via ( 14 );

annealing the first Cu layer ( 17 ) at about 180–200° C. to remove a carbon impurity;

depositing a second Cu layer ( 19 ) to at least partially fill the trench ( 15 ), the second Cu layer deposited through sputtering free of C, Cl and 5 ; and

annealing the first Cu layer ( 17 ) and the second Cu layer ( 19 ) at about 180–200° C. to removed additional impurities;

wherein the step of depositing a second Cu layer further comprises sputtering, the sputtering process substantially free of C, Cl and S impurities.