Process for controlling performance characteristics of a negative differential resistance (NDR) device
A variety of processes are disclosed for controlling NDR characteristics for an NDR element, such as peak-to-valley ratio (PVR), NDR onset voltage (V NDR ) and related parameters. The processes are based on conventional semiconductor manufacturing operations so that an NDR device can be fabricated using silicon based substrates and along with other types of devices.
1. A method of forming a negative differential resistance (NDR) device comprising the steps of:
(a) forming a gated silicon-based NDR element; and
(b) setting a peak-to-valley current ratio (PVR) characteristic of said gated silicon-based NDR element during manufacture of said silicon-based NDR element to a target PVR value located in a range between a first PVR value and a second PVR value;
wherein said target PVR value can be varied during manufacturing of the NDR device within a semiconductor process such that the NDR device can be configured to have a PVR value ranging between a first usable PVR value and a second usable PVR value, where first usable PVR value and said second PVR value vary by at least a factor of ten (10).
2. The method of claim 1 , wherein said first usable PVR value and said second usable PVR value are set in part by a process recipe associated with a single implant operation.
3. The method of claim 1 wherein the NDR device is formed using metal oxide semiconductor (MOS) compatible processing operations.
4. The method of claim 1 , wherein said semiconductor process is used with both a first semiconductor substrate on a first wafer and a second separate semiconductor substrate on a second wafer, and said target PVR value can be set differently for said first wafer and said second wafer using a programmable semiconductor processing apparatus.
5. The method of claim 1 , wherein an NDR voltage onset point ˜VNDR˜ is also set during said manufacture of silicon-based transistor.