Voltage controlled oscillator with a multiple gate transistor and method therefor
A voltage controlled oscillator (VCO) has a plurality of series-connected inverters. Within each inverter a first transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode, a first control electrode coupled to an output terminal of another inverter of the plurality of series-connected inverters, and a second control electrode for receiving a first bias signal. A second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode coupled to a second power supply voltage terminal, and a first control electrode coupled to the first control electrode of the first transistor. The second control electrode of the first transistor of each inverter receives a same or separate analog control signal to adjust the threshold voltage of the first transistors thereof to affect frequency and phase of the VCO's signal.
1. A voltage controlled oscillator comprising:
a plurality of series-connected inverters, each inverter of the plurality of series-connected inverters comprising:
a first transistor having a fin structure comprising a first current electrode coupled to a first power supply voltage terminal, a second current electrode, a first control electrode adjacent a first sidewall of the fin structure and coupled to an output terminal of another inverter of the plurality of series-connected inverters, and a second control electrode adjacent a second sidewall of the fin structure for receiving a first bias signal; and
a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a second current electrode coupled to a second power supply voltage terminal, and a first control electrode coupled to the first control electrode of the first transistor.
2. The voltage controlled oscillator of claim 1 , wherein the first bias signal is for adjusting a threshold voltage, the threshold voltage being a voltage required to form a channel in the first transistor in response to an input signal at the first control electrode of the first transistor.
3. The voltage controlled oscillator of claim 1 , wherein the second control electrode of each first transistor is coupled together to receive the first bias signal.
4. The voltage controlled oscillator of claim 1 , wherein the second control electrode of each first transistor receives a different bias signal.
5. The voltage controlled oscillator of claim 1 , wherein the first bias signal is variable within a predetermined voltage range to adjust an oscillation frequency of the voltage controlled oscillator.
6. The voltage controlled oscillator of claim 1 , wherein the first bias signal is variable to change a conductivity of the first transistor.
7. The voltage controlled oscillator of claim 1 , wherein the second transistor further comprises a second control electrode for receiving a second bias signal.
8. The voltage controlled oscillator of claim 1 further comprising a third transistor, the third transistor having a first current electrode coupled to the first power supply voltage terminal, a second current electrode coupled to the second current electrode of the first transistor, a first control electrode coupled to the first control electrode of the first transistor, and a second control electrode for receiving a second bias signal, wherein the second bias signal is provided separately from the first bias signal.
9. The voltage controlled oscillator of claim 8 , wherein the second bias signal is variable within a predetermined voltage range for adjusting a phase of an output signal of the voltage controlled oscillator.
10. A voltage controlled oscillator comprising:
a plurality of series-connected inverters, each inverter of the plurality of series-connected inverters comprising:
a P-channel multiple independent gate transistor having a fin structure comprising a first current electrode coupled to a first power supply voltage terminal and a second current electrode, a first control electrode adjacent to and separated from the fin structure by a first dielectric layer, the first control electrode overlying a substrate and coupled to an output terminal of another inverter of the plurality of series-connected inverters, and a second control electrode adjacent to and separated from the fin structure by the first dielectric layer, the second control electrode overlying the substrate for receiving a predetermined one of a plurality of analog control signals to adjust a threshold voltage of the P-channel multiple independent gate transistor to affect frequency and phase of the voltage controlled oscillator; and
an N-channel multiple independent gate transistor connected in series with the P-channel multiple independent gate transistor and having a first current electrode coupled to the second current electrode of the P-channel multiple independent gate transistor, a second current electrode coupled to a second power supply voltage terminal, a first control electrode adjacent to and separated from the fin structure by a second dielectric layer, the first control electrode overlying the substrate and coupled to the first control electrode of the P-channel multiple independent gate transistor, and a second control electrode adjacent to and separated from the fin structure by the second dielectric layer, the second control electrode overlying the substrate and coupled to another predetermined one of the plurality of analog control signals.
11. The voltage controlled oscillator of claim 10 wherein the second control electrode of each P-channel multiple independent gate transistor receives a different one of the plurality of analog control signals.
12. The voltage controlled oscillator of claim 10 wherein the second control electrode of each P-channel multiple independent gate transistor receives a same one of the plurality of analog control signals.
13. A method of providing a voltage controlled oscillator comprising:
providing a first inverter, the first inverter comprising:
a first P-channel multiple independent gate transistor having a first fin structure comprising a first current electrode coupled to a first power supply voltage terminal and a second current electrode, a first control electrode formed adjacent a first sidewall of the first fin structure, and a second control electrode formed adjacent a second sidewall of the first fin structure for receiving a predetermined one of a first plurality of analog control signals to adjust transistor threshold voltage to affect frequency and phase of the voltage controlled oscillator; and
a first N-channel multiple independent gate transistor connected in series with the P-channel multiple independent gate transistor and having a second fin structure comprising a first current electrode coupled to the second current electrode of the P-channel multiple independent gate transistor, a second current electrode coupled to a second power supply voltage terminal, a first control electrode formed adjacent a first sidewall of the second fin structure and coupled to the first control electrode of the first transistor, and a second control electrode formed adjacent a second sidewall of the second fin structure for receiving a predetermined one of a second plurality of analog control signals to adjust transistor threshold voltage to affect frequency and phase of the voltage controlled oscillator; and
providing one or more additional inverters in series with the first inverter, the one or more additional inverters each comprising a P-channel multiple independent gate transistor in series with an N-channel multiple independent gate transistor.
14. The method of claim 13 further comprising:
biasing the one or more additional inverters with control signals from the first plurality of analog control signals and the second plurality of analog control signals that differ from those used to bias the first inverter.