IP Library Granted Patent US 7,355,456
Granted Patent B2
US 7,355,456 · App. 11/199,493 · Granted Apr 8, 2008

Wide linear range peak detector

Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,355,456
App. No.
11/199,493
Granted
Apr 8, 2008
Kind
B2
Abstract

A wide linear range peak detector including first and second peak detectors and a compensation circuit. The first peak detector receives an input signal and has an output providing a first peak signal approximation which approximates a peak level of the input signal. The first peak signal approximation includes a non-linear portion which is a function of the peak level of the input signal. The second peak detector also receives the input signal and has an output providing a second peak signal approximation. The compensation circuit uses the second peak signal approximation to provide a compensation signal which compensates the non-linear portion of the first peak signal approximation. In particular, the second peak signal is used to generate the compensation signal to approximate and cancel the non-linear portion.

Claims (73)

1. A wide linear range peak detector, comprising:

a first peak detector having an input receiving an input signal and an output providing a first peak signal approximation which approximates a peak level of said input signal, wherein said first peak signal approximation comprises a non-linear portion which is a function of said peak level of said input signal;

a second peak detector having an input receiving said input signal and an output providing a second peak signal approximation; and

a compensation circuit having an input receiving said second peak signal approximation and an output which is coupled to said first peak detector, wherein said compensation circuit uses said second peak signal approximation to provide a compensation signal which compensates said non-linear portion of said first peak signal approximation;

wherein said first peak detector comprises a differential peak detector providing said first peak signal approximation with positive and negative polarity signals; and

wherein said compensation circuit has an output which is coupled to a selected one of said positive and negative polarity signals of said first peak signal approximation.

2. The wide linear range peak detector of claim 1 , wherein:

said first peak detector comprises:

a first single-ended input peak detector having an input receiving said input signal and an output providing said positive polarity signal of said first peak signal approximation; and

a first reference peak detector having an input coupled to a constant level and an output providing said negative polarity signal of said first peak signal approximation; and

wherein said second peak detector comprises:

a second single-ended input peak detector having an input receiving said input signal and an output providing a positive polarity signal of said second peak signal approximation; and

a second reference peak detector having an input coupled to said constant level and an output providing a negative polarity signal of said second peak signal approximation.

3. The wide linear range peak detector of claim 1 , wherein:

said first peak detector comprises:

a first single-ended input peak detector having an input receiving said input signal and an output providing a positive polarity signal for both of said first and second peak signal approximations; and

a first reference peak detector having an input coupled to a constant value and an output providing said negative polarity signal of said first peak signal approximation; and

wherein said second peak detector comprises:

said first single-ended input peak detector; and

a second reference peak detector having an input coupled to said constant level and an output providing a negative polarity signal of said second peak signal approximation.

4. The wide linear range peak detector of claim 1 , wherein said compensation circuit comprises:

a transconductance amplifier circuit having an input receiving said second peak signal approximation and an output; and

a square-root circuit having an input coupled to said output of said transconductance amplifier circuit and an output providing said compensation signal.

5. The wide linear range peak detector of claim 1 , wherein said compensation circuit comprises:

a differential pair circuit having a differential input receiving said second peak signal approximation and an output, wherein said differential pair circuit converts said second peak signal approximation into a first current using a second constant current; and

a translinear loop square-root circuit having an input coupled to said output of said differential pair circuit and an output providing said compensation signal, wherein said translinear loop square-root circuit multiplies said first current by a constant third current to achieve a current multiple and which performs a square-root function of said current multiple to provide said compensation signal.

6. The wide linear range peak detector of claim 5 , wherein:

said first peak detector comprises a transistor coupled to a capacitor at a negative polarity node which develops said negative polarity signal; and

wherein said output of said translinear loop square-root circuit is coupled to said negative polarity node of said first peak detector.

7. The wide linear range peak detector of claim 5 , wherein said constant second and third currents are selected to optimize compensation.

8. A wide linear range peak detector, comprising:

a first input single-ended peak detector having an input and an output, said input receiving an input signal;

a first reference single-ended peak detector having an input and an output, said input coupled to a constant voltage;

a second reference single-ended peak detector having an input and an output, said input coupled to said constant voltage;

wherein said outputs of said first input single-ended peak detector and said second reference single-ended peak detector form a first differential peak voltage approximation;

a compensation circuit having an input receiving said first differential peak voltage approximation and an output coupled to said output of said first reference single-ended peak detector; and

wherein said outputs of said first input single-ended peak detector and said first reference single-ended peak detector form a compensated differential peak voltage approximation.

9. The wide linear range peak detector of claim 8 , further comprising:

a second input single-ended peak detector having an input receiving said input signal and an output; and

wherein said outputs of said second input single-ended peak detector and said second reference single-ended peak detector form said first differential peak voltage approximation provided to said input of said compensation circuit.

10. The wide linear range peak detector of claim 8 , wherein said compensation circuit comprises:

a transconductance amplifier having a differential input receiving said first differential peak voltage approximation and an output providing a first current that is based on a constant second current; and

a square-root circuit which multiplies said first current by a constant third current to provide a current multiple and which takes the square-root of said current multiple to provide a compensation signal at said output of said compensation circuit.

11. The wide linear range peak detector of claim 8 , wherein said compensation circuit comprises:

a differential pair circuit having a differential input receiving said first differential peak voltage approximation and an output providing a first current that is based on said first differential peak voltage approximation and a constant second current; and

a translinear loop square-root circuit having an input receiving said first current which multiplies said first current by a constant third current to provide a current multiple and which takes the square-root of said current multiple to provide a compensation signal at said output of said compensation circuit.

12. The wide linear range peak detector of claim 8 , wherein said first input single-ended peak detector and said first and second reference single-ended peak detectors each comprise:

a bipolar-junction transistor having a base electrode, an emitter electrode, and a collector electrode coupled to a first voltage supply;

a bias circuit coupled to said base electrode of said bipolar-junction transistor;

a constant current sink coupled between said emitter electrode of said bipolar-junction transistor and a second voltage supply; and

a first capacitor coupled between said emitter electrode of said bipolar-junction transistor and said second voltage supply.

13. The wide linear range peak detector of claim 12 , wherein said first input single-ended peak detector and said first and second reference single-ended peak detectors each further comprise a second capacitor coupled to said base electrode of said bipolar-junction transistor.

14. The wide linear range peak detector of claim 12 , wherein said bias circuit comprises a resistor coupled between a bias voltage and said base electrode of said transistor.

15. A method of determining the peak voltage of an input signal for a wide linear range, comprising:

generating a first peak signal approximation of the input signal as a first differential approximation across a pair of capacitive output terminals, wherein the first peak signal approximation comprises a non-linear portion which is a function of the peak voltage of the input signal;

generating a second peak signal approximation;

converting the second peak signal approximation to a non-linear compensation current based on the non-linear portion of the first peak signal approximation; and

adjusting the first peak signal approximation by the compensation current to compensate for the non-linear portion by applying the compensation current to one of the pair of capacitive output terminals.

16. The method of claim 15 , wherein said converting the second peak signal approximation to a non-linear compensation current comprises:

converting the second peak signal approximation to a first current based on a constant second current;

multiplying the first current by a constant third current and providing a squared current; and

taking the square-root of the squared current.

17. A method of determining the peak voltage of an input signal for a wide linear range, comprising:

generating a first peak signal approximation of the input signal, wherein the first peak signal approximation comprises a non-linear portion which is a function of the peak voltage of the input signal;

generating a second peak signal approximation;

converting the second peak signal approximation to a compensation signal based on the non-linear portion of the first peak signal approximation; and

adjusting the first peak signal approximation by the compensation signal to compensate for the non-linear portion; and

wherein said generating the first and second peak signal approximations each comprise:

applying the input signal to the input of a first transistor-based single-ended peak detector circuit having a first capacitive output terminal; and

coupling a constant voltage to the input of a second transistor-based single-ended peak detector circuit having a second capacitor output terminal.

18. The method of claim 17 , wherein said converting and adjusting comprises:

converting the second peak signal approximation to a compensation current; and

applying the compensation current to the second capacitor output terminal.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Aug 17, 2016
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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From: FREESCALE SEMICONDUCTOR, INC.
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To: CITIBANK, N.A.
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From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
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To: FREESCALE SEMICONDUCTOR, INC.
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Continuity (1)
Related Publication 20070030034A1 · Feb 8, 2007