Cyclic redundancy check based message passing in turbo product code decoding

1. A method, comprising:

receiving an interleaved turbo product code (TPC) code word at a sequence detector;

performing a soft decision algorithm to the interleaved TPC code word at the sequence detector;

transmitting the interleaved TPC code word to a TPC decoder, the transmitting including de-interleaving the TPC code word;

decoding the de-interleaved TPC code word at the TPC decoder into a plurality of code blocks;

performing a cyclic redundancy check (CRC) on each of the plurality of code blocks of the TPC code word;

assigning an artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC; and

iteratively decoding the TPC code word between the soft decision algorithm of the sequence detector and the TPC decoder using the artificially high probability confidence measure assigned to bits of code blocks which pass the CRC, the TPC code word re-interleaved when transmitted to the sequence detector.

2. The method of claim 1 , wherein performing the CRC on each of the plurality of code blocks further comprises performing the CRC on each of the plurality of code blocks during a first iteration between the soft decision algorithm and the TPC decoder.

3. The method of claim 2 , wherein performing the CRC on each of the plurality of code blocks during the first iteration between the soft decision algorithm and the TPC decoder further comprises performing the CRC on each of the code blocks after decoding using the TPC decoder and before the corresponding probability confidence measures from the plurality of code blocks are sent back to the soft decision algorithm.

4. The method of claim 3 , wherein performing the CRC on each of the plurality of code blocks further comprises performing the CRC on each of the plurality of code blocks during each of a plurality of iterations between the soft decision algorithm and the TPC decoder, and wherein assigning the artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC further comprises assigning the artificially high probability confidence measure to bits of each code block which passes the CRC during the iteration in which the code block passes the CRC.

5. The method of claim 1 , wherein the probability confidence measures are log-likelihood ratios, and wherein assigning the artificially high probability confidence measure comprises assigning an artificially high log-likelihood ratio.

6. The method of claim 1 , wherein the soft decision algorithm is a soft output viterbi algorithm (SOVA).

7. The method of claim 1 , wherein the soft decision algorithm is a Bahl, Cocke, Jelinek, and Raviv (BCJR) algorithm.

8. The method of claim 1 , wherein the TPC code word is a TPC code word with single parity check (TPC/SPC).

9. A communication system, comprising:

iterative decoder implementing circuitry configured to:

i) receive an interleaved turbo product code (TPC) code word at a sequence detector;

ii) perform a soft decision algorithm to the interleaved TPC code word at the sequence detector;

iii) transmit the interleaved TPC code word to a TPC decoder, the transmission adapted to de-interleave the TPC code word;

iv) decode the de-interleaved TPC code word at the TPC decoder into a plurality of code blocks;

v) perform a cyclic redundancy check (CRC) on each of the plurality of code blocks of the TPC code word;

vi) assign an artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC; and

vii) iteratively decode the TPC code word between the soft decision algorithm of the sequence detector and the TPC decoder using the artificially high probability confidence measure assigned to bits of code blocks which pass the CRC, the TPC code word re-interleaved when transmitted to the sequence detector.

10. An apparatus comprising:

an iterative decoder having a TPC decoder and a sequence detector implementing a soft decision algorithm, the iterative decoder configured to iteratively decode a turbo product code (TPC) code word between the sequence detector and TPC decoder, the TPC code word interleaved at the sequence detector and de-interleaved at the TPC decoder;

cyclic redundancy check (CRC) implementing circuitry configured to perform a CRC on each of a plurality of code blocks of the TPC code word; and

pre-determined extrinsic information generating circuitry configured to assign extrinsic information representing an artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC, the artificially high probability confidence measure used by the iterative decoder.

11. The apparatus of claim 10 , wherein the cyclic redundancy check implementing circuitry forms part of the iterative decoder.

12. The apparatus of claim 10 , wherein the soft decision algorithm is a soft output viterbi algorithm (SOVA).

13. The apparatus of claim 10 , wherein the soft decision algorithm is a Bahl, Cocke, Jelinek, and Raviv (BCJR) algorithm.

14. The apparatus of claim 10 , wherein the TPC decoder is configured to decode a TPC code word with single parity check (TPC/SPC).

15. The apparatus of claim 10 , wherein the iterative decoder and the CRC implementing circuitry are configured to perform the CRC on each of the code blocks after decoding using the TPC decoder and before the corresponding extrinsic information from the plurality of code blocks are sent back to the soft decision algorithm.

16. The apparatus of claim 15 , wherein the iterative decoder and the CRC implementing circuitry are configured to perform the CRC on each of the plurality of code blocks during each of a plurality of iterations between the soft decision algorithm and the TPC decoder, and wherein the predetermined extrinsic information generating circuitry is configured to assign the extrinsic information representing the artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC during the iteration in which the code block passes the CRC.

17. An iterative decoder, comprising:

a sequence detector adapted to receive an interleaved turbo product code (TPC) code word and to perform a soft decision algorithm to the interleaved TPC code word;

a de-interleaver adapted to de-interleave and transmit the TPC code word from the sequence detector;

a TPC decoder adapted to receive the de-inteleaved TPC code word and to decode the de-interleaved TPC code word into a plurality of code blocks;

cyclic redundancy check (CRC) circuitry adapted to perform a CRC on each of the plurality of code blocks of the TPC code word from the TPC decoder and to assign an artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC before returning the TPC code word to the TPC decoder; and

an interleaver adapted to interleave and transmit the TPC code word from the TPC decoder to the sequence detector, wherein the TPC code word is iteratively decoded between the soft decision algorithm of the sequence detector and the TPC decoder using the artificially high probability confidence measure assigned to bits of code blocks which pass the CRC.

18. A method, comprising:

performing a cyclic redundancy check (CRC) on each of a plurality of code blocks of a turbo product code (TPC) code word;

assigning an artificially high probability confidence measure to bits of any of the plurality of code blocks which pass the CRC; and

iteratively decoding the TPC code word between a soft decision algorithm of a sequence detector and a TPC decoder using the artificially high probability confidence measure assigned to bits of code blocks which pass the CRC, the TPC code word interleaved at the sequence detector and de-interleaved at the TPC decoder.