Memory block reallocation in a flash memory device
A non-volatile memory device has the pages of a certain memory block reallocated to other blocks in order to increase decrease disturb and increase reliability. Each of the reallocation blocks that contain the reallocated pages from the desired memory block are coupled to a wordline driver. These wordline drivers have a subset of the global wordlines as inputs. The desired wordline driver is selected by an appropriate select signal from a block decoder and an indication on an appropriate global wordline. This causes the wordline driver to generate a local wordline to the desired block with the reallocated page to be accessed.
1. A method for reallocating pages of a predetermined memory block, the method comprising:
determining predetermined pages, to be reallocated, from the predetermined memory block; and
reallocating the predetermined pages to at least one other physical memory block wherein only the reallocated predetermined pages are accessed in the at least one other physical memory block.
2. The method of claim 1 wherein the predetermined memory block is block 0 .
3. The method of claim 1 wherein the predetermined pages to be reallocated are pages 32 - 63 .
4. The method of claim 1 wherein moving the predetermined pages includes reallocating the predetermined pages among a plurality of physical memory blocks.
5. A method for reallocating predetermined pages of a predetermined memory block in a flash memory array comprising a plurality of memory blocks coupled to a plurality of global wordlines, the method comprising:
determining the predetermined pages, to be reallocated, from the predetermined memory block; and
physically reallocating the predetermined pages amongst a plurality of memory blocks wherein only the reallocated predetermined pages are accessed in the at least one other physical memory block.
6. The method of claim 5 wherein physically reallocating includes reallocating the global wordlines amongst the plurality of memory blocks.
7. The method of claim 5 wherein the flash memory array is a NAND flash memory array.
8. The method of claim 5 and further including erasing the predetermined memory block by erasing the plurality of memory blocks.
9. The method of claim 6 and further including programming the predetermined memory block by activating a predetermined global wordline of the plurality of global wordlines.
10. The method of claim 5 wherein the plurality of memory blocks includes the predetermined memory block.