IP Library Granted Patent US 7,456,492
Granted Patent B2
US 7,456,492 · App. 11/634,862 · Granted Nov 25, 2008

Semiconductor device having semiconductor element, insulation substrate and metal electrode

Assignee: DENSO CORPORATION
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Quick Facts
Patent No.
US 7,456,492
App. No.
11/634,862
Granted
Nov 25, 2008
Kind
B2
Abstract

A semiconductor device includes: first and second metal electrodes having inner surfaces facing each other; a semiconductor element sandwiched between the electrodes; and first and second insulation substrates disposed on the electrode and opposite to the semiconductor element, respectively. Each of the insulation substrates is made of ceramics. At least one of the electrodes includes a plurality of layers stacked in a direction parallel to a stacking direction. One layer disposed on a semiconductor element side has a thermal expansion coefficient, which is higher than that of another layer disposed on an insulation substrate side.

Claims (40)

1. A semiconductor device comprising:

first and second metal electrodes having heat radiation property, wherein inner surfaces of metal electrodes face each other;

a semiconductor element sandwiched between the first and second metal electrodes, wherein the semiconductor element is electrically connected to both inner surfaces of the electrodes; and

first and second insulation substrates having heat radiation property, wherein the first insulation substrate is disposed on the first metal electrode, and opposite to the semiconductor element, and wherein the second insulation substrate is disposed on the second metal electrode, and opposite to the semiconductor element, wherein

each of the first and second insulation substrates is made of ceramics,

at least one of the first and second metal electrodes includes a plurality of layers, which are stacked in a direction parallel to a stacking direction of the electrodes, the semiconductor element and the insulation substrates, and

one layer disposed on a semiconductor element side has a thermal expansion coefficient, which is higher than that of another layer disposed on an insulation substrate side.

2. The device according to claim 1 , wherein

each of the first and second metal electrodes includes a plurality of layers, which are stacked in a direction parallel to the stacking direction.

3. The device according to claim 1 , wherein

at least one of the first and second metal electrodes further includes a slit.

4. The device according to claim 1 , wherein

one layer, which is nearest to the insulation substrate, is made of iron series metal.

5. The device according to claim 4 , wherein

another layer, which is nearest to the semiconductor element, is made of copper, copper alloy, aluminum or aluminum alloy.

6. The device according to claim 5 , wherein

the insulation substrate is made of alumina, aluminum nitride, or silicon nitride.

7. The device according to claim 4 , wherein

only one layer, which is nearest to the semiconductor element, is electrically connected to an external circuit.

8. The device according to claim 7 , wherein

the one layer nearest to the semiconductor element is electrically connected to a conductive member through a conductive joining member, and

the one layer is electrically connected to the external circuit through the conductive member.

9. The device according to claim 7 , wherein

the one layer nearest to the semiconductor element is electrically connected to a conductive member through a bonding wire, and

the one layer is electrically connected to the external circuit through the conductive member.

10. The device according to claim 1 , further comprising:

a metallic layer disposed on at least one of the first and second insulation substrates, wherein

the metallic layer is opposite to the metal electrode, and

the metallic layer is electrically insulated from the metal electrode.

11. The device according to claim 10 , wherein

the metallic layer has a thickness, which is smaller than a thickness of the metal electrode, which is opposite to the metallic layer.

12. The device according to claim 10 , wherein

the metallic layer has a planar area, which is smaller than a planar area of the insulation substrate, on which the metallic layer is disposed, and

the metallic layer is completely disposed on the insulation substrate.

13. The device according to claim 10 , wherein

the metallic layer has a slit.

14. The device according to claim 10 , further comprising:

a resin mold for molding the metallic layer, the first and second metal electrodes, the semiconductor element, and the first and second insulation substrates, wherein

the metallic layer has a surface, which is exposed from the resin mold, and

each of the first and second metal electrodes has a portion, which is exposed from the resin mold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2006
From: MOCHIDA, AKIRA
To: DENSO CORPORATION
Reel/Frame 018649/0584 →
Priority Claims (1)
JP 2005-371815 · Dec 26, 2005 · national
Continuity (1)
Related Publication 20070145540A1 · Jun 28, 2007