IP Library › Granted Patent US 7,508,021
Granted Patent B2
US 7,508,021 · App. 11/760,775 · Granted Mar 24, 2009

RF power transistor device with high performance shunt capacitor and method thereof

Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,508,021
App. No.
11/760,775
Granted
Mar 24, 2009
Kind
B2
Abstract

An integrated shunt capacitor comprises a bottom plate ( 86,88 ), a capacitor dielectric ( 92 ) overlying a portion of the bottom plate, a top plate ( 62 ) overlying the capacitor dielectric, a shield ( 74 ) overlying a portion of the top plate ( 62 ); and a metallization feature ( 70 ) disposed about and isolated from at least two sides of the top plate ( 62 ), the metallization feature ( 70 ) for coupling the bottom plate ( 86,88 ) to the shield ( 74 ). In one embodiment, an RF power transistor has an impedance matching network including an integrated shunt capacitor as described herein.

Claims (44)

1. An integrated shunt capacitor comprising:

a conductive bottom plate;

a capacitor dielectric overlying a portion of the bottom plate;

a conductive top plate overlying the capacitor dielectric;

a shield overlying a portion of the top plate, wherein the shield is isolated from the top plate; and

a metallization feature disposed (i) along at least two sides of the top plate and (ii) isolated from the at least two sides of the top plate, wherein the metallization feature electrically couples the bottom plate to the overlying shield, further wherein (iii)(a) the metallization feature that extends along and is isolated from the sides of the top plate, (iii)(b) the bottom plate, and (iii)(c) the overlying shield together form a grounded chamber for isolating a corresponding portion of the integrated shunt capacitor from parasitic interference external to the integrated shunt capacitor.

2. The shunt capacitor of claim 1 , further comprising:

a bond pad disposed adjacent to the top plate, wherein a top metal metallization couples the bond pad to the top plate, in a region of the top plate not covered by the shield overlying a portion of the top plate.

3. The shunt capacitor of claim 1 , wherein the metallization feature comprises a U-shaped feature, as viewed from a top down perspective.

4. The shunt capacitor of claim 3 , further wherein the U-shaped feature extends along a first dimension on two sides and along a second dimension on a third side of the shunt capacitor.

5. The shunt capacitor of claim 1 wherein the metallization feature includes both a first layer metallization metal and a second layer metallization metal.

6. The shunt capacitor of claim 1 , wherein the shield comprises a grounding shield, the grounding shield including a metallization coupled to a ground potential.

7. The shunt capacitor of claim 6 , further wherein coupling together of the bottom plate, metallization feature, and grounding shield reduces a series resistance of the bottom plate to ground potential.

8. The shunt capacitor of claim 6 , wherein the shunt capacitor comprises a unit cell implementation.

9. The shunt capacitor of claim 8 , wherein the bottom plate, metallization feature, and grounding shield provide a grounded chamber for isolating a corresponding portion of the unit cell from external interference.

10. The shunt capacitor of claim 8 , further comprising:

a plurality of unit cell implementations disposed adjacent to one another, wherein bottom plates of adjacent unit cell implementations are merged together.

11. The shunt capacitor of claim 1 , wherein the shunt capacitor is implemented in an impedance matching network of a radio frequency (RF) power transistor.

12. The shunt capacitor of claim 1 , further comprising:

a semiconductor substrate; and

an isolation layer overlying the substrate, wherein the bottom plate overlies the isolation layer.

13. The shunt capacitor of claim 1 , wherein the bottom plate comprises tungsten silicide and wherein the capacitor dielectric comprises nitride.

14. The shunt capacitor of claim 1 , wherein the portion of the top plate shielded by the shield comprises a percentage of the top plate tailored according to requirements of a given radio frequency (RF) power transistor application.

15. A radio frequency (RF) power transistor having an impedance matching network including an integrated shunt capacitor as claimed in claim 1 .

16. An integrated shunt capacitor comprising:

a conductive bottom plate;

a capacitor dielectric overlying a portion of the bottom plate;

a conductive top plate overlying the capacitor dielectric;

a shield overlying a portion of the top plate. wherein the shield comprises a grounding shield, the grounding shield including a metallization coupled to a ground potential; and

a metallization feature disposed about and isolated from at least two sides of the top plate, the metallization feature for coupling the bottom plate to the shield,

wherein the shunt capacitor comprises a unit cell implementation,

wherein the bottom plate, metallization feature, and grounding shield provide a grounded chamber for isolating a portion of the unit cell from external interference, and

wherein the grounded metallization feature extending along three sides of the unit cell forms a grounded wall for reducing a parasitic interference external to the unit cell.

17. An integrated shunt capacitor comprising:

a conductive bottom plate;

a capacitor dielectric overlying a portion of the bottom plate;

a conductive top plate overlying the capacitor dielectric;

a shield overlying a portion of the top plate; and

a metallization feature disposed about and isolated from at least two sides of the top plate, the metallization feature for coupling the bottom plate to the shield, wherein the shunt capacitor comprises a unit cell implementation, further comprising:

a bonding pad; and

an arrangement of shunt capacitor unit cells disposed around at least two side edges of the bonding pad.

18. The shunt capacitor of claim 17 , wherein the shield further includes overlying a portion of the top plate of each unit cell of the arrangement of shunt capacitor unit cells disposed around the bonding pad.

19. The shunt capacitor of claim 18 , wherein the arrangement includes first, second, and third pluralities of unit cells disposed around three side edges of the bonding pad, respectively.

20. The shunt capacitor of claim 19 , further wherein each plurality of unit cells is coupled to a corresponding side of the bonding pad through a metallization extension coupled to a corresponding top plate contact via of each unit cell of each plurality of unit cells.

Assignments (23)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0793 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0655 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded May 19, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 022703/0405 →
SECURITY AGREEMENT Recorded Nov 1, 2007
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 020045/0448 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2007
From: REN, XIAOWEI; LAMEY, DANIEL J.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 019404/0901 →
Continuity (1)
Related Publication 20070297120A1 · Dec 27, 2007