Method for calibrating a multi-bit digital-to-analog converter, multi-bit digital-to-analog converter in which this method is applied and converter provided with such a multi-bit digital-to-analog converter
In a method for calibrating a multi-bit DAC intended, particularly, for application in high-speed and high-resolution ADCs, such as Σ Δ ADCs, and comprising a number of DAC cells, apart from the number of DAC cells applied in the multi-bit DAC for conversion, an additional DAC cell is provided, which can be interchanged with each of the other DAC cells in order to switch each DAC cell successively from the multi-bit DAC into a calibration circuit to calibrate said DAC cell without interrupting the conversion. The calibration circuit includes means for measuring errors in the DAC cell under calibration and means for correcting said DAC cell.
1. Multi-bit digital-to-analog converter, for application in high-speed and high-resolution analog-to-digital converters, comprising a number of digital-to-analog converter cells (DAC cells) and a calibration circuit to calibrate these DAC cells, characterized in that, apart from the number of DAC cells applied in the multi-bit DAC for conversion, an additional DAC cell is provided, which can be interchanged with each of the other DAC cells, and switching means to switch each DAC cell successively from the multi-bit DAC into the calibration circuit to calibrate said DAC cell without interrupting the conversion;
characterized in that the calibration circuit with a DAC cell incorporated therein comprises a 1-bit analog-to-digital converter supplying a feedback signal for controlling switches in the DAC cell, a combination circuit for combining the output signal of the DAC cell with a reference value, whereafter the combined signal is fed to the 1-bit analog-to-digital converter via a loop filter.
2. Multi-bit digital-to-analog converter according to claim 1 , characterized in that each DAC cell is a unitary DAC cell.
3. Multi-bit digital-to-analog converter according to claim 1 , characterized in that the calibration circuit with a DAC cell incorporated therein further comprises a corrector for calibration of the DAC cell in response to the output signal of the 1-bit comparator.
4. Multi-bit digital-to-analog converter according to claim 3 , characterized in that a timing circuit is provided to generate a calibration slot time within a time interval wherein the 1-bit analog-to-digital converter is inactive with respect to DAC cell error measurement.
5. Multi-bit digital-to-analog converter according to claim 1 , characterized in that an active calibration block is provided which together with a respective DAC cell includes the 1-bit analog-to-digital converter and further comprises a memory for storing the errors in the respective DAC cells, measured by the 1-bit analog-to-digital converter, while, based on these data and on the output signals of the converter in which the multi-bit digital-to-analog converter is applied, error correction values are generated and added to the output signal of the converter in which the multi-bit digital-to-analog converter is applied.
6. Converter provided with a multi-bit digital-to-analog converter as claimed in claim 1 .