IP Library › Granted Patent US 7,608,519
Granted Patent B2
US 7,608,519 · App. 11/498,667 · Granted Oct 27, 2009

Method of fabricating trench isolation of semiconductor device

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,608,519
App. No.
11/498,667
Granted
Oct 27, 2009
Kind
B2
Abstract

In a method of fabricating a trench isolation structure of a semiconductor device, excellent gap filling properties are attained, without the generation of defects. In one aspect, the method comprises: loading a substrate with a trench formed therein into a high-density plasma (HDP) chemical vapor deposition apparatus; primarily heating the substrate; applying a first bias power to the apparatus so as to form an HDP oxide liner on side wall and bottom surfaces of the trench, a gap remaining in the trench following formation of the HDP oxide liner; removing the application of the first bias power and secondarily heating the substrate; applying a second bias power at a power level that is greater than that of the first bias power to the substrate so as to form an HDP oxide film to fill the gap in the trench; and unloading the substrate from the apparatus.

Claims (53)

1. A method of fabricating a trench isolation structure of a semiconductor device, comprising:

providing a substrate with a trench formed therein;

forming an oxide film on side wall and bottom surfaces of the trench;

forming a nitride liner on the oxide film on the side wall and bottom surfaces of the trench, and on top surfaces of the substrate;

loading the substrate into a high-density plasma (HDP) chemical vapor deposition apparatus;

primarily heating the substrate;

applying a first bias power to the apparatus so as to form an HDP oxide liner on an entire surface of the nitride liner, a gap remaining in the trench following formation of the HDP oxide liner;

removing the application of the first bias power and secondarily heating the substrate;

applying a second bias power at a power level that is greater than that of the first bias power to the substrate so as to form an HDP oxide film to fill the gap in the trench; and

unloading the substrate from the apparatus.

2. The method of claim 1 , wherein, in the primarily heating, the substrate is heated to a temperature in a range of about 300 to 400° C.

3. The method of claim 1 , wherein, in the forming of the HDP oxide liner, the substrate is heated to a temperature in a range of about 300 to 450° C.

4. The method of claim 1 , wherein the first bias power is in a range of about 500 to 2000 W.

5. The method of claim 1 , wherein the forming of the HDP oxide liner is performed within a time period which corresponds to a range of about 1/200 to 1/10 amount of a time period for forming of the HDP oxide film.

6. The method of claim 1 , wherein the forming of the HDP oxide liner is performed for a time period ranging from about one to five seconds.

7. The method of claim 1 , wherein, in the forming of the HDP oxide liner, a He gas is used as a sputtering gas.

8. The method of claim 1 , wherein, in the secondarily heating, the substrate is heated to temperature in a range of about 400 to 600° C.

9. The method of claim 1 , wherein the secondarily heating is performed for a time period ranging from about 50 to 150 seconds.

10. The method of claim 1 , wherein, in the forming of the HDP oxide film, the substrate is at a temperature ranging from about 600 to 800° C.

11. The method of claim 1 , wherein the second bias power is in a range of about 3000 to 6000 W.

12. The method of claim 1 , wherein the forming of the HDP oxide film is performed for time period ranging from about 50 to 200 seconds.

13. The method of claim 1 , wherein, in the forming of the HDP oxide film, a H 2 gas is used as a sputtering gas.

14. The method of claim 1 , wherein an oxide film and a nitride liner are sequentially formed on the side wall and bottom surfaces of the trench.

15. The method of claim 1 , wherein the substrate comprises:

a semiconductor base substrate;

a pad oxide layer on the semiconductor base substrate; and

a nitride layer on the pad oxide layer.

16. A method of fabricating a trench isolation structure of a semiconductor device, comprising:

providing a substrate with a trench formed therein;

forming an oxide film on side wall and bottom surfaces of the trench;

forming a nitride liner on the oxide film on side wall and bottom surfaces of the trench, and on top surfaces of the substrate;

loading the substrate into a high-density plasma (HDP) chemical vapor deposition apparatus;

primarily heating the substrate;

forming a He HDP oxide liner on an entire surface of the nitride liner, a gap remaining in the trench following forming the He HDP oxide liner;

secondarily heating the substrate;

forming a H 2 HDP oxide film to fill the gap in the trench; and

unloading the substrate from the apparatus.

17. The method of claim 16 , wherein, in the forming of the He HDP oxide liner, a first bias power is applied and, in the forming of the H 2 HDP oxide film, a second bias power is applied at a power level that is greater than that of the first bias power.

18. The method of claim 17 , wherein the first bias power is in a range of about 500 to 2000 W.

19. The method of claim 17 , wherein the second bias power is in a range of about 3000 to 6000 W.

20. The method of claim 16 , wherein, in the primarily heating, the substrate is heated to a temperature in a range of about 300 to 400° C.

21. The method of claim 16 , wherein, in the forming of the He HDP oxide liner, the substrate is at a temperature in a range of about 300 to 450° C.

22. The method of claim 16 , wherein a time required for forming the He HDP oxide liner is in a range of about 1/200 to 1/10 an amount of time required for forming the H 2 HDP oxide film.

23. The method of claim 16 , wherein the forming of the He HDP oxide liner is performed for a time period ranging from about one to five seconds.

24. The method of claim 16 , wherein, in the secondarily heating, the substrate is heated to a temperature ranging from about 400 to 600° C.

25. The method of claim 16 , wherein the secondarily heating is performed for a time period ranging from about 50 to 150 seconds.

26. The method of claim 16 , wherein, in the forming of the H 2 HDP oxide film, the temperature of the substrate is in a range of about 600 to 800° C.

27. The method of claim 16 , wherein the forming of the H 2 HDP oxide film is performed for a time period ranging from about 50 to 200 seconds.

28. The method of claim 16 , wherein an oxide film and a nitride liner are sequentially formed on the side wall and bottom surfaces of the trench.

29. The method of claim 16 , wherein the substrate comprises:

a semiconductor base substrate;

a pad oxide layer on the semiconductor base substrate; and

a nitride layer on the pad oxide layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2006
From: SHIN, DONG-SUK; JEONG, YONG-KUK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 018158/0317 →
Priority Claims (1)
KR 10-2005-0072792 · Aug 9, 2005 · national
Continuity (1)
Related Publication 20070037348A1 · Feb 15, 2007