IP Library › Granted Patent US 7,633,107
Granted Patent B2
US 7,633,107 · App. 11/505,417 · Granted Dec 15, 2009

Semiconductor device and manufacturing method thereof

Assignee: Fujitsu Microelectronics Limited
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Quick Facts
Patent No.
US 7,633,107
App. No.
11/505,417
Granted
Dec 15, 2009
Kind
B2
Abstract

On forming a ferroelectric capacitor structure, an IrO 2 film and an IrO x film which are constituents of an upper electrode layer are sequentially formed on a capacitor film. By RTA treatment at 600° C. to 750° C., in this case, at 725° C. for about one minute under an O 2 atmosphere, only a surface layer of the IrO x film is oxidized, and a highly oxidized layer which is higher in oxidation degree as compared with the other portion of the IrO x film is formed.

Claims (11)

1. A semiconductor device, comprising:

a semiconductor substrate; and

a capacitor structure formed above said semiconductor substrate, and formed by sandwiching a capacitor film composed of a dielectric material by a lower electrode and an upper electrode,

wherein the upper electrode has an iridium oxide film,

wherein the iridium oxide film includes a stacked structure of a first iridium oxide layer crystallized in a composition of IrO 2 (iridium dioxide), and a second iridium oxide layer lower in oxidation degree than the first iridium oxide layer, and

wherein a surface layer of the second iridium oxide layer is made a highly oxidized layer higher in oxidation degree of iridium than a portion directly below the surface layer.

2. The semiconductor device according to claim 1 , wherein the highly oxidized layer is crystallized in a composition of IrO 2 (iridium dioxide).

3. The semiconductor device according to claim 1 , wherein the upper electrode has an iridium film on the iridium oxide film.

4. The semiconductor device according to claim 1 , wherein the capacitor film is formed from a ferroelectric material.

5. The semiconductor device according to claim 1 , wherein said capacitor structure is a stack type which is electrically connected below the lower electrode and above the upper electrode, respectively.

6. The semiconductor device according to claim 1 , wherein said capacitor structure is a planar type which is electrically connected above the lower electrode and above the upper electrode, respectively.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR MEMORY SOLUTION LIMITED
Reel/Frame 053195/0249 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2006
From: MATSUURA, OSAMU
To: FUJITSU LIMITED
Reel/Frame 018205/0705 →
Priority Claims (1)
JP 2006-100723 · Mar 31, 2006 · national
Continuity (1)
Related Publication 20070228511A1 · Oct 4, 2007