IP Library › Granted Patent US 7,645,665
Granted Patent B2
US 7,645,665 · App. 11/607,927 · Granted Jan 12, 2010

Semiconductor device having shallow b-doped region and its manufacture

Assignee: Fujitsu Microelectronics Limited
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Quick Facts
Patent No.
US 7,645,665
App. No.
11/607,927
Granted
Jan 12, 2010
Kind
B2
Abstract

A method for manufacturing a semiconductor device has the steps of: (a) implanting boron (B) ions into a semiconductor substrate; (b) implanting fluorine (F) or nitrogen (N) ions into the semiconductor device; (c) after the steps (a) and (b) are performed, executing first annealing with a heating time of 100 msec or shorter relative to a region of the semiconductor substrate into which ions were implanted; and (d) after the step (c) is performed, executing second annealing with a heating time longer than the heating time of the first annealing, relative to the region of the semiconductor substrate into which ions were implanted. The method for manufacturing a semiconductor device is provided which can dope boron (B) shallowly and at a high concentration.

Claims (17)

1. A method for manufacturing a semiconductor device, comprising the steps of:

(x) forming an insulated gate electrode on an n-type active region in a semiconductor

(a) implanting boron (B) ions into said n-type active region, using said insulated gate electrode as a mask;

(b) implanting fluorine (F) or nitrogen (N) ions into said n-type active region, using said insulated gate electrode as a mask;

(c) after said steps (x), (a) and (b) are performed, executing first annealing with a heating time of 100 msec or shorter relative to a region of said semiconductor substrate into which ions were implanted; and

(d) after said step (c) is performed, executing second annealing with a heating time longer than the heating time of said first annealing, relative to the region of said semiconductor substrate into which ions were implanted, wherein said step (d) is carried out after said step (c) without an intervening ion implantation process.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein:

said step (a) forms p-type extension regions of source/drain regions of a p-channel transistor in said n-type active region on both sides of said insulated gate electrode.

3. The method for manufacturing a semiconductor device according to claim 2 , further comprising the step of:

(f) after said step (x), implanting n-type impurity ions into said n-type active region deeper than said extension regions to form n-type pocket regions.

4. The method for manufacturing a semiconductor device according to claim 3 , wherein: said step (f) is performed at an oblique incident angle.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein:

said semiconductor substrate includes a p-type active region;

said step (x) also forms said insulated gate electrode on said p-type active region; and

said step (a) forms p-type pocket regions of an n-channel transistor in said p-type active region on both sides of said insulated gate structure.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein said steps (a) and (b) are executed at a same time by implanting BF or BF 2 ions.

7. The method for manufacturing a semiconductor device according to claim 1 , wherein: the region implanted with boron by said step (a) has such a boron concentration profile after said step (d), that has a non-active region from a surface of said semiconductor substrate to a first depth, a plateau region from the first depth to a second depth, and a sloped portion from the second depth, and the boron concentration at the first depth is at least 2×10 20 cm −3 .

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2006
From: KUBO, TOMOHIRO; OKABE, KENICHI; YAMAMOTO, TOMONARI
To: FUJITSU LIMITED
Reel/Frame 018664/0259 →
Priority Claims (1)
JP 2006-094702 · Mar 30, 2006 · national
Continuity (1)
Related Publication 20070232039A1 · Oct 4, 2007