IP Library Granted Patent US 7,659,608
Granted Patent B2
US 7,659,608 · App. 11/532,387 · Granted Feb 9, 2010

Stacked die semiconductor device having circuit tape

Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 7,659,608
App. No.
11/532,387
Granted
Feb 9, 2010
Kind
B2
Abstract

A stacked die semiconductor package includes a first integrated circuit chip, a first circuit tape coupled to the first integrated circuit chip, a second integrated circuit chip coupled to the first circuit tape, and at least one component coupled to the first circuit tape. The at least one component may include one or more passive components, one or more active components, or a combination of passive and active components. The stacked die semiconductor package can also include a second circuit tape coupled to the second integrated circuit chip and a third integrated circuit chip coupled to the second circuit tape. The stacked die semiconductor package can also include an encapsulant.

Claims (73)

1. A semiconductor device comprising:

a first integrated circuit chip;

a first circuit tape coupled to the first integrated circuit chip;

a second integrated circuit chip coupled to the first circuit tape;

at least one component coupled to the first circuit tape; and

a second circuit tape coupled to the second integrated circuit chip.

2. The semiconductor device of claim 1 , wherein the first circuit tape is coupled to a top surface of the first integrated circuit chip and the second circuit tape is coupled to a bottom surface of the first integrated circuit chip.

3. The semiconductor device of claim 1 , further comprising a third integrated circuit chip.

4. The semiconductor device of claim 3 , wherein the third integrated circuit chip is coupled to the second circuit tape.

5. The semiconductor device of claim 1 , further comprising at least one component coupled to the second circuit tape.

6. A semiconductor device, comprising:

a first integrated circuit chip;

a first circuit tape coupled to the first integrated circuit chip;

a second integrated circuit chip coupled to the first circuit tape;

at least one component coupled to the first circuit tape; and

a second circuit tape coupled to the first integrated circuit chip.

7. The semiconductor device of claim 6 , further comprising at least one component coupled to the second circuit tape.

8. The semiconductor device of claim 6 , further comprising a third integrated circuit chip coupled to the second circuit tape.

9. A method for making a semiconductor device, comprising:

providing a first integrated circuit chip having a top surface;

coupling the first integrated circuit chip to a top surface of a substrate;

providing a first piece of circuit tape having a top surface;

coupling the first piece of circuit tape to the top surface of the first integrated circuit chip;

providing a second integrated circuit chip having a top surface; and

coupling the second integrated circuit chip to the top surface of the first piece of circuit tape.

10. The method of claim 9 , further comprising:

providing one or more passive components to be coupled to the first piece of circuit tape; and

coupling the one or more passive components to the top surface of the first piece of circuit tape.

11. The method of claim 9 , further comprising:

providing one or more active components to be coupled to the first piece of circuit tape; and

coupling the one or more active components to the top surface of the first piece of circuit tape.

12. The method of claim 9 , further comprising encapsulating the semiconductor device, wherein the encapsulating comprises covering the first integrated circuit chip, the first piece of circuit tape, and the second integrated circuit chip with an encapsulant.

13. The method of claim 10 , further comprising encapsulating the semiconductor device, wherein the encapsulating comprises covering the first integrated circuit chip, the first piece of circuit tape, the second integrated circuit chip, and the one or more passive components coupled to the top surface of the first piece of circuit tape with a first encapsulant.

14. The method of claim 11 , further comprising encapsulating the semiconductor device, wherein the encapsulating comprises covering the first integrated circuit chip, the first piece of circuit tape, the second integrated circuit chip, and the one or more active components coupled to the top surface of the first piece of circuit tape with a first encapsulant.

15. A method for making a semiconductor device, comprising:

providing a first integrated circuit chip having a top surface;

coupling the first integrated circuit chip to a top surface of a substrate;

providing a first piece of circuit tape having a top surface;

coupling the first piece of circuit tape to the top surface of the first integrated circuit chip;

providing a second integrated circuit chip having a top surface;

coupling the second integrated circuit chip to the top surface of the first piece of circuit tape;

providing a second piece of circuit tape having a top surface;

coupling the second piece of circuit tape to the top surface of the second integrated circuit chip;

providing a third integrated circuit chip having a top surface; and

coupling the third integrated circuit chip to the top surface of the second piece of circuit tape.

16. The method of claim 15 , further comprising:

providing one or more passive components to be coupled to the second piece of circuit tape; and

coupling the second plurality of passive components to the top surface of the second piece of circuit tape.

17. A method for making a semiconductor device, comprising:

providing a first integrated circuit chip having a top surface;

coupling the first integrated circuit chip to a top surface of a substrate;

providing a first piece of circuit tape having a top surface;

coupling the first piece of circuit tape to the top surface of the first integrated circuit chip;

providing a second integrated circuit chip having a top surface;

coupling the second integrated circuit chip to the top surface of the first piece of circuit tape;

providing a second piece of circuit tape having a bottom surface;

coupling the second piece of circuit tape to a bottom surface of the second integrated circuit chip;

providing a third integrated circuit chip having a bottom surface; and

coupling the third integrated circuit chip to the bottom surface of the second piece of circuit tape.

18. The method of claim 17 , further comprising:

providing one or more passive components to be coupled to the second piece of circuit tape; and

coupling the second plurality of passive components to the bottom surface of the second piece of circuit tape.

19. A semiconductor device made according to the method of claim 9 .

20. The method of claim 17 , further comprising including the semiconductor device in a computer, personal digital assistant, digital camera, or cellular telephone.

21. The method of claim 17 , wherein the semiconductor device is a ball grid array package.

22. A semiconductor device, comprising:

a substrate;

a first die coupled to a top surface of the substrate, wherein the first die has a smaller surface area than the substrate;

a piece of circuit tape affixed to a top surface of the first die;

a second die mounted on top of the piece of circuit tape; and

one or more components mounted on top of the piece of circuit tape.

23. The semiconductor device of claim 22 , wherein the one or more components comprises one or more passive components.

24. The semiconductor device of claim 22 , wherein the one or more components comprises one or more active components.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC LTD. AND CORRECT THE NAME OF RECEIVING PARTY DATA FROM STSTS CHIPPAC PTE. LTE. TO STSTS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED AT REEL: 64838 FRAME: 948. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 30, 2024
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 067567/0595 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2008
From: STATS CHIPPAC, INC.
To: STATS CHIPPAC LTD.
Reel/Frame 021425/0530 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2006
From: CABLAO, PHILIP LYNDON R.; FILOTEO, DARIO S., JR.; ESPIRITU, EMMANUEL A.; MERILO, LEO A.
To: STATS CHIPPAC, INC.
Reel/Frame 018411/0680 →
Continuity (1)
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