IP Library › Granted Patent US 7,678,641
Granted Patent B2
US 7,678,641 · App. 11/211,103 · Granted Mar 16, 2010

Semiconductor device and fabrication process thereof

Assignee: Fujitsu Microelectronics Limited
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Quick Facts
Patent No.
US 7,678,641
App. No.
11/211,103
Granted
Mar 16, 2010
Kind
B2
Abstract

There is provided a semiconductor device having a device isolation region of STI structure formed on a silicon substrate so as to define a device region, wherein the device isolation region comprises a device isolation trench formed in the silicon substrate, and a device isolation insulation film filling the device isolation trench. At least a surface part of the device isolation insulation film is formed of an HF-resistant film.

Claims (28)

1. A method of fabricating a semiconductor device, comprising the steps of:

forming a device isolation trench in a silicon substrate while using an SiN pattern as a mask;

forming, after said step of forming said device isolation trench, a silicon oxide film in said device isolation trench to cover said SiN pattern;

removing a part of said silicon oxide film located above said SiN pattern by a polishing process;

removing, after said polishing process, a part of said silicon oxide film in said device isolation trench while leaving said silicon oxide film on a bottom part of said device isolation trench;

depositing, after said step of removing a part of said silicon oxide film in said device isolation trench, an HF resistant film comprising SiOCN or SiCN so as to cover said silicon oxide film left on said bottom part of said device isolation trench and to fill at least a top part of said device isolation trench and so as to cover said SiN pattern; and

removing said SiN pattern and said HF-resistant film on said SiN pattern, such that said HF-resistant film has a top surface flush to or above a top surface of said silicon substrate.

2. The method as claimed in claim 1 , wherein said low-pressure CVD process forms an SiOCN film as said HF-resistant film by causing to react bis tertiary butylaminosilane with any of oxygen or N 2 O.

3. The method as claimed in claim 2 , wherein said low-pressure CVD process is conducted under a process pressure of 100 Pa or less.

4. The method as claimed in claim 1 , wherein said low-pressure CVD process forms an SiCN film as said HF-resistant film by causing to react bis tertiary butylaminosilane with ammonia.

5. The method as claimed in claim 1 , wherein said low-pressure CVD process is conducted such that said HF-resistant film fills said device isolation trench from a bottom part thereof to a top part thereof.

6. The method as claimed in claim 1 , wherein said SiOCN film has a refractive index of 1.670 or more.

7. The method as claimed in claim 1 , wherein said HF-resistant film being formed by a low-pressure CVD process while using bis-tertiary butylaminosilane as a source material.

8. A method of fabricating a semiconductor device, comprising the steps of:

forming a device isolation trench in a silicon substrate while using an SiN pattern as a mask;

depositing an HF resistant film comprising SiOCN or SiCN so as to fill at least a top part of said device isolation trench and so as to cover said SiN pattern; and

removing said SiN pattern and said HF-resistant on said SiN pattern, said method further comprising, after said step of forming said device isolation trench but before deposition of said HF-resistant film, the step of filling a bottom part of said device isolation trench by a silicon oxide film excluding a top part of said device isolation trench,

said step of depositing said HF-resistant film is conducted such that said HF-resistant film covers said silicon oxide film in said device isolation trench and such that said HF-resistant film fills said top part of said device isolation trench,

said step of removing said SiN pattern and said HF-resistant film being conducted by a wet etching process while using a silicon oxide pattern formed on said HF-resistant film in correspondence to said device isolation trench as a mask.

9. The method as claimed in claim 8 , wherein said step of filling said silicon oxide film at said bottom part of said device isolation trench comprises the step of depositing, after said step of forming said device isolation trench but before said step of depositing said HF-resistant film, a silicon oxide film so as to fill said device isolation trench from said bottom part to said top part, and removing a part of said silicon oxide film filling said top part of said device isolation trench.

10. A method for fabricating a semiconductor device, comprising the steps of:

forming a mask layer on a semiconductor substrate;

forming a trench in said semiconductor substrate by etching said semiconductor substrate while using said mask layer as a mask;

depositing an insulation film in an interior of said trench and over said mask layer;

removing said insulation film located over said mask layer by a polishing process;

depositing an HF-resistant film over said insulation film embedded in said trench and over said mask layer; and

removing said HF-resistant film located over said mask layer by a polishing process.

11. The method as claimed in claim 10 , wherein said HF-resistant film is an SiOCN film.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2005
From: MORI, TOSHIFUMI; OOKOSHI, KATSUAKI; WATANABE, TAKASHI; OHTA, HIROYUKI
To: FUJITSU LIMITED
Reel/Frame 017195/0902 →
Priority Claims (1)
JP 2005-173695 · Jun 14, 2005 · national
Continuity (1)
Related Publication 20060278952A1 · Dec 14, 2006