Electrically optimized and structurally protected via structure for high speed signals
View Patent ↗An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
1. A method of making a multilayer device, comprising:
in a layer of the multilayer device, providing at least one reference plane, wherein the at least one reference plane is either a voltage plane or a ground connection plane;
providing in the layer a plurality of vies connecting the layer in the multilayer device with at least one other layer in the multilayer device, wherein the layer has a via clearance area between the associated with each via in the plurality of vies, the via clearance area providing a space between an associated via in the plurality of vias and the at least one reference plane such that the associated via does not contact the at least one reference plane, the via clearance area comprising a dielectric material; and
providing at least one a floating support member in each via clearance area in the layer between the associated via in the plurality of vies and the at least one reference plane, wherein: the floating support member encircles the associated via in the plurality of vies, wherein the floating support member is not electrically connected to the associated via or the at least one reference plane, and the floating support member is not .electrically connected to the at least one reference plane, wherein the at least one floating support member has a ring configuration in the layer.
2. The method of claim 1 , wherein the floating support member comprises a plurality of floating support members in a plurality of layers of the multilayer device and wherein the plurality of floating support members are connected by way of one or more floating microvia structures.
3. The method of claim 1 , wherein the at least one floating support member is fabricated using a structurally rigid material.
4. The method of claim 1 , wherein the at least one floating support member is fabricated using a metal material.
5. The method of claim 1 , further comprising providing a contact on one surface of the multilayer device.
6. The method of claim 5 , wherein there is approximately zero capacitance affect between the contact and the at least one reference plane.
7. The method of claim 5 , wherein the contact is positioned relative to the at least one reference plane such that there is approximately zero overlap of the contact with the at least one reference plane.
8. The method of claim 1 , wherein the multilayer device is one of a multilayer organic (MLO) package, multilayer ceramic (MLC) package, or a printed circuit board (PCB).
9. The method of claim 1 , wherein the at least one floating support member provides structural support in the via clearance area against an external force applied to the multilayer device.
10. The method of claim 1 , wherein the via clearance area between the via and the at least one reference plane is formed such that the via does not contact any reference plane in the multilayer device.
11. The method of claim 1 , wherein the via connects signal transmission wiring on one layer of the multilayer device with a contact on a second layer of the multilayer device, wherein the contact is a ball grid array (BGA) pad.
12. A method of making a multilayer device, comprising:
in a layer of the multilayer device, providing at least one reference plane, wherein the at least one reference plane is either a voltage plane or a ground connection plane;
providing in the layer a plurality of vias connecting the layer in the multilayer device with at least one other layer in the multilayer device, wherein the layer has a via clearance area between the associated with each via in the plurality of vias, the via clearance area providing a space between an associated via in the plurality of vias and the at least one reference plane such that the associated via does not contact any reference plane in the multilayer device, the via clearance area comprising a dielectric material; and
providing at least one a floating support member in each via clearance area in the layer between the associated via in the plurality of vias and the at least one reference plane, wherein: the floating support member encircles the associated via in the plurality of vias, wherein the floating support member is not electrically connected to the associated via or the at least one reference plane, the floating support member is not electrically connected to the at least one reference plane, and wherein the at least one floating support member provides structural support in the via clearance area against an external force applied to the multilayer device, wherein the at least one floating support member has a ring configuration in the layer.