Method and apparatus for dynamic allocation of resources to executing threads in a multi-threaded processor
View Patent ↗A method and apparatus are provided for dynamically allocating an access bandwidth for one or more resources to threads of a multithreaded processor. The allocation is performed by providing an execution based metric for each thread and providing an access to the resource in dependence on the execution based metrics of the threads. In addition, or alternatively, a resource based metric can be determined and the access to the resource is provided in dependence on the resource based metric.
1. A method of dynamically allocating access to a memory of a multithreaded processor, comprising the steps of:
configuring a multithreaded processor to execute more than one thread simultaneously;
requesting memory access from the more than one thread;
deriving an automatic Microprocessor without Interlocked Pipeline Stages (MIPS) allocation (AMA) metric for each thread of the more than one thread from execution metrics for said each thread;
deriving an in-page metric for said each thread from a page address of a last memory access and an in-page address required for an executing thread;
determining the access to the memory based on the AMA metric and the in-page metric;
wherein the page address of the last memory access is stored in a register and compared with the in-page address for the executing thread to derive the in-page metric;
wherein the in-page metric is used to optimize a memory latency; and
wherein the AMA metric is derived by the steps of taking a bit slice from each of two or more execution metrics and combining the bit slices to derive the AMA metric.
2. The method according to claim 1 , further including the steps of passing each bit slice, using passing means for the bit slice, through an over-range checking logic and setting a value to a maximum, if the bit slice is over-ranged.
3. The method according to claim 2 , further including the step of combining the in-page metric with a user defined priority for each thread.
4. The method according to claim 3 , further including the step of providing an equal access to the resource from two or more threads with equivalent overall metrics.
5. The method according to claim 1 , wherein the AMA metric is based on a deadline by which a thread must be executed.
6. The method according to claim 1 , wherein the AMA metric is based on a delay since an execution of a thread has been requested.
7. A computer for dynamically allocating an access to a memory of a multi-threaded processor, comprising:
the multi-threaded processor to execute more than one thread simultaneously;
means configured to derive an automatic Microprocessor without Interlocked Pipeline Stages MIPS allocation (AMA) metric for each thread from execution metrics for that thread;
means configured to derive an in-page metric for each thread from a page address of a last memory access and an in-page address required for an executing thread;
means configured to determine the access to the memory and other resources for each thread, depending on the AMA metric and the in-page metric;
wherein the page address of the last memory access is stored in a register and compared with the in-page address for the executing thread to derive the in-page metric;
wherein the in-page metric is used to optimize a memory latency; and
wherein the AMA metric is derived by the steps of taking a bit slice from each of two or more execution metrics and combining the bit slices to derive the AMA metric.