IP Library › Granted Patent US 7,745,928
Granted Patent B2
US 7,745,928 · App. 12/164,396 · Granted Jun 29, 2010

Heat dissipation plate and semiconductor device

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 7,745,928
App. No.
12/164,396
Granted
Jun 29, 2010
Kind
B2
Abstract

A heat dissipation plate having a lamination of a copper layer, a molybdenum layer and a graphite layer, and outer copper layers each provided on a surface of the lamination, is disclosed. And also a semiconductor device using the heat dissipation plate is disclosed.

Claims (20)

1. A heat dissipation plate, comprising:

a lamination of a copper layer, a molybdenum layer and a graphite layer; and

outer copper layers, each provided on a surface of the lamination.

2. The heat dissipation plate according to claim 1 , wherein a metal frame member is provided at a periphery of the lamination.

3. The heat dissipation plate according to claim 2 , wherein the metal frame member is formed of copper.

4. The heat dissipation plate according to claim 2 , wherein the metal frame member is formed of a combination of copper and molybdenum.

5. The heat dissipation plate according to claim 1 , wherein the lamination has a plurality of layers including the copper layer, the graphite layer and the molybdenum layer laminated alternately.

6. The heat dissipation plate according to claim 3 , wherein the metal frame member is integrally formed with one of the outer copper layers.

7. The heat dissipation plate according to claim 1 , further comprising a semiconductor chip mounting portion provided between the outer copper layers corresponding to an area for a semiconductor element to be mounted on.

8. The heat dissipation plate according to claim 7 , wherein the semiconductor chip mounting portion includes a lamination of copper layers.

9. The heat dissipation plate according to claim 7 , wherein the semiconductor chip mounting portion is formed of copper and the semiconductor chip mounting portion is integrally formed with one of the outer copper layers.

10. The heat dissipation plate according to claim 7 , wherein the semiconductor chip mounting portion includes a lamination of copper layers and molybdenum layers.

11. The heat dissipation plate according to claim 1 , wherein the outer copper layer is thicker than the copper layer of the lamination.

12. The heat dissipation plate according to claim 1 , wherein a ratio between a total thickness of the outer copper layers and the copper layer in the lamination, and a total thickness of the graphite layer is 1.

13. A semiconductor device, comprising:

a heat dissipation plate having a lamination of a copper layer, a graphite layer and a molybdenum layer, and outer copper layers each provided on a surface of the lamination;

a semiconductor element mounted on the heat dissipation plate, the semiconductor element having semiconductor chip and substrate;

a frame having open ends at opposite sides and outer connecting terminal, the frame being attached to the heat dissipation plate at one open end and encompassing the semiconductor element;

a cover attached to the other open end of the frame member; and

a wire connecting the semiconductor element and the outer connecting terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2008
From: HASEGAWA, TSUYOSHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 021543/0497 →
Priority Claims (1)
JP 2007-177636 · Jul 5, 2007 · national
Continuity (1)
Related Publication 20090008770A1 · Jan 8, 2009