IP Library › Granted Patent US 7,767,913
Granted Patent B2
US 7,767,913 · App. 11/359,863 · Granted Aug 3, 2010

Electronic devices including conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, and accompanying methods

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,767,913
App. No.
11/359,863
Granted
Aug 3, 2010
Kind
B2
Abstract

Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting member extends through a hole in the substrate and communicates electrically with a first trace of each of the first and second pairs, while a second conductive interconnecting member extends through the hole and communicates electrically with the second trace of each of the first and second pairs. The first and second interconnecting members are separated from one another by a distance substantially equal to a distance separating the conductive traces in each pair. Electronic device assemblies include a transmitting device configured to transmit a differential signal through a conductive structure to a receiving device. The conductive structure includes first and second pair of conductive traces with first and second interconnecting members providing electrical communication therebetween.

Claims (59)

1. An electronic device comprising:

an at least substantially planar substrate having at least one hole extending therethrough;

a first pair of electrically conductive traces, the first pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate;

a second pair of electrically conductive traces, the second pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate;

an electrically conductive first interconnecting member extending through the at least one hole and electrically communicating with an end of a first trace of the first pair and an end of a first trace of the second pair; and

an electrically conductive second interconnecting member extending through the at least one hole and electrically communicating with an end of a second trace of the first pair and an end of a second trace of the second pair, the first interconnecting member being separated from the second interconnecting member by a distance that is at least substantially equal to a distance separating the electrically conductive traces of the first pair and a distance separating the electrically conductive traces of the second pair, wherein at least a portion of the second interconnecting member completely surrounds the first interconnecting member.

2. The electronic device of claim 1 , wherein the first pair of electrically conductive traces extend at least substantially parallel to one another in a first plane on or in the substrate and the second pair of electrically conductive traces extend at least substantially parallel to one another in a second plane on or in the substrate, the second plane being oriented at least substantially parallel to the first plane and separated therefrom by a distance.

3. The electronic device of claim 1 , wherein the distance separating the first interconnecting member from the second interconnecting member is less than about 30 microns.

4. An electronic device comprising:

an at least substantially planar substrate having at least one hole extending therethrough;

a first pair of electrically conductive traces, the first pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate;

a second pair of electrically conductive traces, the second pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate;

an electrically conductive first interconnecting member extending through the at least one hole and electrically communicating with an end of a first trace of the first pair and an end of a first trace of the second pair; and

an electrically conductive second interconnecting member extending through the at least one hole and electrically communicating with an end of a second trace of the first pair and an end of a second trace of the second pair, the first interconnecting member being separated from the second interconnecting member by a distance that is at least substantially equal to a distance separating the electrically conductive traces of the first pair and a distance separating the electrically conductive traces of the second pair;

wherein the first interconnecting member has a hollow at least substantially cylindrical shape having an inner diameter, and wherein the second interconnecting member has an at least substantially cylindrical shape having an outer diameter, the second interconnecting member being disposed within the first interconnecting member.

5. The electronic device of claim 1 , further comprising a dielectric material disposed between the first interconnecting member and the second interconnecting member.

6. The electronic device of claim 5 , further comprising an additional dielectric material disposed between the conductive traces of the first pair and the conductive traces of the second pair, the additional dielectric material exhibiting a dielectric constant that is greater than a dielectric constant exhibited by the dielectric material disposed between the first interconnecting member and the second interconnecting member.

7. The electronic device of claim 5 , wherein the dielectric material exhibits a dielectric constant that provides a capacitance between the first interconnecting member and the second interconnecting member that at least substantially matches a capacitance between the electrically conductive traces of the first pair and a capacitance between the electrically conductive traces of the second pair.

8. The electronic device of claim 4 , wherein the distance separating the first interconnecting member from the second interconnecting member is less than about 30 microns.

9. The electronic device of claim 4 , further comprising a dielectric material disposed between the first interconnecting member and the second interconnecting member.

10. The electronic device of claim 9 , wherein the dielectric material comprises a polymer material.

11. The electronic device of claim 9 , further comprising an additional dielectric material disposed between the conductive traces of the first pair and the conductive traces of the second pair, the additional dielectric material exhibiting a dielectric constant that is greater than a dielectric constant exhibited by the dielectric material disposed between the first interconnecting member and the second interconnecting member.

12. The electronic device of claim 9 , wherein the dielectric material exhibits a dielectric constant that provides a capacitance between the first interconnecting member and the second interconnecting member that at least substantially matches a capacitance between the electrically conductive traces of the first pair and a capacitance between the electrically conductive traces of the second pair.

13. The electronic device of claim 4 , wherein the first pair of electrically conductive traces extend at least substantially parallel to one another in a first plane on or in the substrate and the second pair of electrically conductive traces extend at least substantially parallel to one another in a second plane on or in the substrate, the second plane being oriented at least substantially parallel to the first plane and separated therefrom by a distance.

14. A method of fabricating an electronic device assembly, the method comprising:

providing an at least substantially planar substrate having at least one hole extending therethrough;

forming at least a first pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate and a second pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate;

forming an electrically conductive first interconnecting member extending through the at least one hole and electrically communicating with an end of a first trace of the first pair and an end of a first trace of the second pair;

forming an electrically conductive second interconnecting member extending through the at least one hole and electrically communicating with an end of a second trace of the first pair and an end of a second trace of the second pair, the first interconnecting member being separated from the second interconnecting member by a distance that is at least substantially equal to a distance separating the electrically conductive traces of the first pair and a distance separating the electrically conductive traces of the second pair; and

forming at least a portion of the second interconnecting member to completely surround the first interconnecting member.

15. The method of claim 14 , wherein providing an at least substantially planar substrate having at least one hole extending therethrough comprises:

providing an at least substantially planar substrate; and

forming the at least one hole through the substrate.

16. The method of claim 15 , wherein forming the at least one hole through the substrate comprises forming at least one at least substantially cylindrical hole through the substrate.

17. The method of claim 14 , wherein forming an electrically conductive first interconnecting member comprises depositing a layer of conductive material on exposed surfaces of the substrate within the at least one hole.

18. The method of claim 17 , further comprising providing a layer of dielectric material on exposed surfaces of the layer of conductive material within the at least one hole.

19. The method of claim 18 , wherein forming an electrically conductive second interconnecting member comprises depositing conductive material on exposed surfaces of the layer of dielectric material within the at least one hole.

20. The method of claim 19 , further comprising:

removing a first portion of the first interconnecting member adjacent a first major surface of the substrate to create a first void; and

removing a second portion of the first interconnecting member adjacent a second major surface of the substrate to create a second void.

21. The method of claim 20 , wherein forming at least a first pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate and a second pair of electrically conductive traces extending at least substantially parallel to one another on or in the substrate comprises:

forming at least a first pair of electrically conductive traces on a first major surface of the substrate, a conductive trace of the first pair of electrically conductive traces extending through the first void to an end of the second interconnecting member adjacent the first major surface; and

forming at least a second pair of electrically conductive traces on a second major surface of the substrate, a conductive trace of the second pair of electrically conductive traces extending through the second void to an end of the second interconnecting member adjacent the second major surface.

22. The method of claim 14 , further comprising:

providing a transmitting device configured to apply a differential signal between the conductive traces of the first pair, between the first interconnecting member and the second interconnecting member, and between the conductive traces of the second pair;

providing a receiving device configured to receive the differential signal applied by the transmitting device; and

establishing electrical communication between the transmitting device and the receiving device through the conductive traces of the first pair, the first interconnecting member and the second interconnecting member, and the conductive traces of the second pair.

23. A method of designing an electrical device assembly comprising a transmitting device configured to transmit a differential signal to a receiving device, the method comprising:

providing a substrate having at least one hole extending at least partially therethrough;

selecting a conductive path extending from a first location disposed in a plane on or in the substrate to a second location disposed in a second plane on or in the substrate, a first segment of the conductive path extending through the at least one hole;

configuring a first pair or electrically conductive traces to extend at least substantially parallel to one another along a second portion of the conductive path from the first location to the at least one hole and a second pair of electrically conductive traces to extend at least substantially parallel to one another along a third portion of the conductive path from the second location to the at least one hole, the conductive traces of the first pair being separated from one another by a distance, the conductive traces of the second pair being separated from one another by the distance;

configuring a conductive first interconnecting member to extend through the at least one hole and communicate electrically with an end of a first trace of the first pair and an end of a first trace of the second pair;

configuring a conductive second interconnecting member to extend through the at least one hole and communicate electrically with an end of a second trace of the first pair and an end of a second trace of the second pair, the first interconnecting member being separated from the second interconnecting member by a distance that is at least substantially equal to the distance separating the conductive traces of the first pair from one another and the conductive traces of the second pair from one another; and

forming at least a portion of the second interconnecting member to completely surround the first interconnecting member.

24. The method of claim 23 , wherein configuring a conductive first interconnecting member comprises configuring the first interconnecting member to have an at least substantially cylindrical shape having an outer diameter, and wherein configuring a conductive second interconnecting member comprises configuring the second interconnecting member to have a hollow at least substantially cylindrical shape having an inner diameter, the first interconnecting member being disposed within the second interconnecting member, the distance between the outer diameter of the first interconnecting member and the inner diameter of the second interconnecting member being at least substantially equal to the distance separating the electrically conductive traces of the first pair and the distance separating the electrically conductive traces of the second pair.

25. The method of claim 24 , wherein the distance separating the first interconnecting member from the second interconnecting member is configured to be less than about 30 microns.

26. The method of claim 23 , further comprising selecting a dielectric material to be disposed between the first interconnecting member and the second interconnecting member.

27. The method of claim 26 , wherein selecting a dielectric material comprises selecting a dielectric material that exhibits a dielectric constant that provides a capacitance between the first interconnecting member and the second interconnecting member at least substantially equal to a capacitance between the electrically conductive traces of the first pair and a capacitance between the electrically conductive traces of the second pair.

28. The method of claim 23 , further comprising configuring a transmitting device to communicate electrically with a receiving device through the conductive traces of the first pair, the first interconnecting member, the second interconnecting member, and the conductive traces of the second pair.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2006
From: CORISIS, DAVID J.; KUAN, LEE CHOON; CHONG, CHIN HUI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 017767/0555 →
Priority Claims (1)
SG 200601114-2 · Feb 20, 2006 · national
Continuity (1)
Related Publication 20070194431A1 · Aug 23, 2007