IP Library Granted Patent US 7,842,523
Granted Patent B2
US 7,842,523 · App. 11/797,194 · Granted Nov 30, 2010

Buried conductor for imagers

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,842,523
App. No.
11/797,194
Granted
Nov 30, 2010
Kind
B2
Abstract

A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A first insulating layer is located over the photo-conversion device and the at least one contact area. The pixel cell further includes at least one conductor in contact with the at least one contact area. The conductor includes a polysilicon material extending through the first insulating layer and in contact with the at least one contact area. Further, a conductive material, which includes at least one of a silicide and a refractory metal, can be over and in contact with the polysilicon material.

Claims (38)

1. A method of forming a pixel cell, the method comprising the acts of:

forming a photo-conversion device at a surface of a substrate;

forming at least one contact area;

forming at least a first insulating layer over the photo-conversion device and the at least one contact area;

forming at least one opening in the first insulating layer;

forming a polysilicon comprising material within the at least one opening and in contact with the at least one contact area; and

forming a conductive material layer over and in contact with the polysilicon comprising material, the act of forming the conductive material layer comprising forming at least one of a silicide layer and a refractory metal layer.

2. The method of claim 1 , wherein the act of forming the at least one contact area comprises forming a gate electrode.

3. The method of claim 2 , wherein the act of forming the at least one contact area comprises forming a gate electrode of one of a transfer, reset, row select, and source-follower transistor.

4. The method of claim 1 , wherein the act of forming the at least one contact area comprises forming a floating diffusion region.

5. The method of claim 1 , wherein the act of forming the at least one contact area comprises forming a source/drain region of a transistor.

6. The method of claim 1 , wherein the act of forming the conductive material layer comprises forming a silicide layer.

7. The method of claim 6 , wherein the silicide layer comprises a silicide selected from the group consisting of a tungsten silicide, titanium silicide, cobalt silicide, molybdenum silicide, and tantalum silicide layer.

8. The method of claim 1 , wherein the act of forming the conductive material layer comprises forming a barrier metal/refractory metal layer.

9. The method of claim 8 , wherein the act of forming the conductive material layer comprises forming a tungsten nitride/tungsten layer.

10. The method of claim 8 , wherein the act of forming the conductive material layer comprises forming a titanium nitride/tungsten layer.

11. The method of claim 1 , further comprising the act of forming a second insulating layer over the photo-conversion device and below the first insulating layer.

12. The method of claim 1 , further comprising the act of planarizing the polysilicon comprising material and the first insulating layer such that the polysilicon comprising material has a top surface on a same plane as a top surface of the first insulating layer.

13. The method of claim 12 , further comprising the act of forming a conductive material layer over and in contact with the polysilicon comprising material, wherein the act of forming the conductive material layer comprises forming a polysilicon/barrier metal/refractory metal layer.

14. The method of claim 12 , further comprising the act of forming a conductive material layer over and in contact with the polysilicon comprising material, wherein the act of forming the conductive material layer comprises forming a polysilicon/silicide layer.

15. The method of claim 1 , further comprising the acts of forming a plurality of contact areas and forming a plurality of openings, each opening formed to expose a respective contact area, wherein the polysilicon comprising layer is formed within each of the openings and in contact with a respective contact area.

16. The method of claim 1 , further comprising the acts of:

forming at least one line coupled to the polysilicon comprising material; and

coupling the at least one line to circuitry external to the pixel cell.

17. A method of forming a pixel cell, the method comprising the acts of:

forming a photo-conversion device at a surface of a substrate;

forming a first transistor coupled to the photo-conversion device, the first transistor having a gate electrode and a gate insulator over the gate electrode;

forming at least one insulating layer over the photo-conversion device and the first transistor;

forming a first opening in the at least one insulating layer and the gate insulator, the first opening extending to the gate electrode;

providing a polysilicon comprising layer in the first opening and in contact with the gate electrode.

18. The method of claim 17 , further comprising the acts of:

providing a conductive layer over and in contact with the polysilicon comprising layer, the conductive layer comprising at least one of a silicide and a refractory metal.

19. The method of claim 17 , further comprising the acts of:

forming a floating diffusion region coupled to the first transistor; and

forming a second opening in a second insulating layer, the second opening extending to the floating diffusion region, wherein the act of forming the polysilicon comprising layer comprises forming the polysilicon comprising layer in the second opening.

20. The method of claim 17 , further comprising the act of forming first and second insulating layers over the photo-conversion device.

21. The method of claim 17 , wherein the act of forming the at least one insulating layer comprises forming a borophosphosilicate glass layer.

22. The method of claim 17 , the act of forming the at least one insulating layer comprises forming a tetraethyl orthosilicate layer.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 1116876000 · Jun 29, 2005
Related Publication 20070200181A1 · Aug 30, 2007