Stressed semiconductor using carbon and method for producing the same

1. A method, comprising:

forming a carbon layer on a substrate;

forming a semiconductor layer above the carbon layer, the carbon layer to stress the semiconductor layer, wherein the carbon layer is discontinuous;

forming a device in said semiconductor layer above said carbon layer.

2. The method of claim 1 , wherein the carbon layer is a stressed diamond layer, wherein forming the stressed diamond layer comprises:

depositing a continuous stressed diamond layer; and

patterning the continuous stressed diamond layer.

3. The method of claim 1 , wherein the carbon layer is a stressed diamond layer, wherein forming the stressed diamond layer comprises:

abrading the substrate;

patterning the abraded substrate; and

growing a stressed diamond layer on the abraded substrate.

4. The method of claim 1 , wherein the carbon layer is a stressed diamond layer, wherein forming the stressed diamond layer comprises:

depositing a solution comprising crystalline carbon particles to form a film;

patterning the film; and

growing a stressed diamond layer on the film.

5. A method, comprising:

forming a stressed diamond layer above a substrate;

depositing a buffer layer over to the stressed diamond layer;

forming a silicon layer above the buffer layer such that the silicon layer is stressed;

forming a transistor in the silicon layer; and

wherein the buffer layer comprises a polysilicon layer and a silicon dioxide layer.

6. A method, comprising:

forming a discontinuous tensilely stressed carbon layer over a substrate;

forming a discontinuous compressively stressed carbon layer over the substrate;

forming an polycrystalline layer over both the tensilely stressed and compressively stressed carbon layers; and

forming a semiconductor layer over the polycrystalline layer such that the semiconductor layer above the tensilely stressed carbon layer is compressively stressed and the semiconductor layer above the compressively stressed carbon layer is tensilely stressed.

7. The method of claim 6 , wherein the polycrystalline layer is polysilicon.

8. The method of claim 6 , wherein forming the semiconductor layer comprises:

growing an oxide layer adjacent to a semiconductor substrate;

implanting ions within the semiconductor substrate to form a dislocation to separate the semiconductor substrate into a first portion and a second portion, the first portion disposed between the oxide layer and ions, and the second portion disposed adjacent to the ions;

bonding the oxide layer and the polycrystalline layer; and

removing the second portion.

9. The method of claim 6 , wherein forming the discontinuous compresssively stressed carbon layer comprises:

depositing a nitride layer on the substrate and discontinuous tensilely stressed carbon layer;

selectively removing the nitride layer superjacent to the substrate;

forming nucleation sites superjacent to the substrate; and

forming the discontinuous compressively stressed carbon layer on the nucleation sites.

10. A method comprising:

forming a transistor having a channel region in a semiconductor layer; and

forming a stressed carbon layer over the channel region of the transistor, the carbon layer to produce stress in the channel region; and

wherein forming the stressed carbon layer comprises forming the stressed carbon layer with carbon particles having a grain size to produce tensile stress in the silicon layer.

11. The method of claim 10 , wherein forming the stressed carbon layer comprises forming the stressed carbon layer at greater than or equal to 700 C to produce tensile stress in the silicon layer.

12. The method of claim 10 , wherein the grain size is less than 10 microns.

13. The method of claim 10 , wherein the carbon layer comprises graphite and diamond.

14. The method of claim 13 , wherein the carbon layer comprises less than 20% graphite and is to produce tensile stress in the silicon layer.

15. An apparatus comprising:

a stressed carbon layer formed over a substrate;

a semiconductor layer formed over the carbon layer, the carbon layer to stress the semiconductor layer, wherein the stressed carbon layer is discontinuous; and

a device formed in said semiconductor layer above said stressed carbon layer.

16. An apparatus comprising:

a transistor having a channel region formed in a semiconductor layer; and

a first stressed carbon layer formed over the channel region of the transistor, the first stressed carbon layer producing a stress in the channel region; and

wherein the first carbon layer is under tensile stress.

17. The apparatus of claim 16 , further comprising a second stressed carbon layer below the semiconductor layer, the second carbon layer to further stress the semiconductor layer.

18. The apparatus of claim 17 , wherein the first and second carbon layers are to spread thermal energy away from the device.