IP Library Granted Patent US 7,902,652
Granted Patent B2
US 7,902,652 · App. 11/894,338 · Granted Mar 8, 2011

Semiconductor package and semiconductor system in package using the same

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,902,652
App. No.
11/894,338
Granted
Mar 8, 2011
Kind
B2
Abstract

Disclosed are a semiconductor package and semiconductor system in package using the same. The semiconductor package includes: a printed circuit board (PCB); a semiconductor die disposed on the PCB and having conductive posts formed on an upper surface of the semiconductor die; and a molding formed on the PCB to cover the semiconductor die, wherein the conductive posts have a surface exposed out of an upper surface of the molding. The semiconductor system in package includes: a first semiconductor package having a semiconductor die on which conductive posts are formed, and a molding formed so that upper surfaces of the conductive posts are exposed; and a second semiconductor package disposed on the first semiconductor package and electrically connected to the conductive posts.

Claims (11)

1. A semiconductor system in package (SIP), comprising:

a first semiconductor package including a first printed circuit board (PCB), a first semiconductor die being disposed on the first PCB and having conductive posts disposed on an upper surface of the first semiconductor die, and a first molding disposed on the first PCB and being configured to cover the first semiconductor die and the conductive posts, wherein upper surfaces of the conductive posts are exposed out of the first molding; and

a second semiconductor package including a second PCB, a second semiconductor die being disposed on the second PCB, and a second molding disposed on the second PCB and being configured to cover the second semiconductor die;

wherein a second PCB is directly disposed on both of an upper surface of the first molding and the upper surfaces of the conductive posts;

wherein the first and second semiconductor packages are electrically connected to each other through the conductive posts without solder balls therebetween.

2. The semiconductor system in package as claimed in claim 1 , wherein the first semiconductor die comprises:

bonding pads being disposed on the upper surface of the first semiconductor die;

an insulation layer being on the upper surfade of the first semiconductor die in such a manner that the bonding pads are exposed out of the insulation layer; and

bump-pads formed on the bonding pads exposed out of the insulation layer;

wherein the conductive posts are formed on the bump-pads.

3. The semiconductor system in package as claimed in claim 1 , wherein the first and second semiconductor packages are electrically connected to each other only through the conductive posts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2007
From: SEO, HO-SEONG; CHO, SHI-YUN; LEE, YOUNG-MIN; KIM, SANG-HYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 019787/0222 →
Priority Claims (1)
KR 10-2006-0093433 · Sep 26, 2006 · national
Continuity (1)
Related Publication 20080073771A1 · Mar 27, 2008